国民技术N32G032 PWM+DMA 8路输出
2024-05-20 22:03:56
1、功能说明
1、TIM1 和 TIM8 CH1 CH2 CH3 CH4 8路信号进行DMA PWM输出
2、使用环境
软件开发环境： KEIL MDK-ARM V5.26.2.0
硬件环境： 基于N32G032R8L7_STB开发
3、使用说明
系统配置；
1、时钟源：
HSE=8M,PLL=48M,AHB=48M,APB1=48M,APB2=48M,TIM1 CLK=48M,DMA CLK=48M
2、端口配置：
PA4选择为TIM1 CH1输出
PB3选择为TIM1 CH2输出
PA5选择为TIM1 CH3输出
PB11选择为TIM1 CH4输出
PA0选择为TIM8 CH1输出
PA1选择为TIM8 CH2输出
PA2选择为TIM8 CH3输出
PB1选择为TIM8 CH4输出
3、TIM：
TIM1 TIM8循环触发DMA传输
4、DMA：
DMA1_CH1~8通道回环模式搬运3个半字 Buffer[3]变量到TIM1 CC1~4 TIM8 CC1~4寄存器
使用方法：
1、编译后打开调试模式，用示波器或者逻辑分析仪观察TIM1~8 CH的波形
2、TIM1 TIM8循环周期改变占空比，循环改变
/****************************************************************************** Copyright (c) 2019, Nations Technologies Inc.** All rights reserved.* ****************************************************************************** Redistribution and use in source and binary forms, with or without* modification, are permitted provided that the following conditions are met:** - Redistributions of source code must retain the above copyright notice,* this list of conditions and the disclaimer below.** Nations' name may not be used to endorse or promote products derived from* this software without specific prior written permission.** DISCLAIMER: THIS SOFTWARE IS PROVIDED BY NATIONS "AS IS" AND ANY EXPRESS OR* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE* DISCLAIMED. IN NO EVENT SHALL NATIONS BE LIABLE FOR ANY DIRECT, INDIRECT,* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.* ****************************************************************************//*** @file main.c* @author Nations Solution Team* @version v1.0.1** @copyright Copyright (c) 2019, Nations Technologies Inc. All rights reserved.*/
#include "main.h"/** @addtogroup TIM_DMA* @{*/#define TIM1_CCR3_Address 0x40012C3CTIM_TimeBaseInitType TIM_TimeBaseStructure;
OCInitType TIM_OCInitStructure;uint16_t Left_Large_Buffer[3];
uint16_t Left_Middle_Buffer[3];
uint16_t Left_Small_Buffer[3];uint16_t Right_Large_Buffer[3];
uint16_t Right_Middle_Buffer[3];
uint16_t Right_Small_Buffer[3];uint16_t TimerPeriod = 48;uint16_t CCR1_Val = 0;
uint16_t CCR2_Val = 0;
uint16_t CCR3_Val = 0;
uint16_t CCR4_Val = 0;
//uint16_t PrescalerValue = 0;void RCC_Configuration(void);
void GPIO_Configuration(void);
void DMA_Configuration(void);/*** @brief Main program*/
int main(void)
{/* System Clocks Configuration */RCC_Configuration();/* GPIO Configuration */GPIO_Configuration();/* DMA Configuration */DMA_Configuration(); /* -----------------------------------------------------------------------TIM3 Configuration: generate 4 PWM signals with 4 different duty cycles:The TIM3CLK frequency is set to SystemCoreClock (Hz), to get TIM3 counterclock at 24 MHz the Prescaler is computed as following:- Prescaler = (TIM3CLK / TIM3 counter clock) - 1SystemCoreClock is set to 48 MHz for N32G032 deviceThe TIM3 is running at 36 KHz: TIM3 Frequency = TIM3 counter clock/(AR + 1)= 24 MHz / 666 = 36 KHzTIM3 Channel1 duty cycle = (TIM3_CCR1/ TIM3_ARR)* 100 = 50%TIM3 Channel2 duty cycle = (TIM3_CCR2/ TIM3_ARR)* 100 = 37.5%TIM3 Channel3 duty cycle = (TIM3_CCR3/ TIM3_ARR)* 100 = 25%TIM3 Channel4 duty cycle = (TIM3_CCR4/ TIM3_ARR)* 100 = 12.5%----------------------------------------------------------------------- *//* Compute the prescaler value */
// PrescalerValue = (uint16_t)(SystemCoreClock / 12000000) - 1;/* Time base configuration */Left_Small_Buffer[0] = (uint16_t)(((uint32_t)1 * (TimerPeriod - 1)) / 10);Left_Small_Buffer[1] = (uint16_t)(((uint32_t)2 * (TimerPeriod - 1)) / 10);Left_Small_Buffer[2] = (uint16_t)(((uint32_t)3 * (TimerPeriod - 1)) / 10);Left_Middle_Buffer[0] = (uint16_t)(((uint32_t)4 * (TimerPeriod - 1)) / 10);Left_Middle_Buffer[1] = (uint16_t)(((uint32_t)5 * (TimerPeriod - 1)) / 10);Left_Middle_Buffer[2] = (uint16_t)(((uint32_t)6 * (TimerPeriod - 1)) / 10);Left_Large_Buffer[0] = (uint16_t)(((uint32_t)7 * (TimerPeriod - 1)) / 10);Left_Large_Buffer[1] = (uint16_t)(((uint32_t)8 * (TimerPeriod - 1)) / 10);Left_Large_Buffer[2] = (uint16_t)(((uint32_t)9 * (TimerPeriod - 1)) / 10); /* TIM1 Peripheral Configuration --------------------------------------------*//* Time Base configuration */TIM_TimeBaseStructure.Prescaler = 0;TIM_TimeBaseStructure.CntMode = TIM_CNT_MODE_UP;TIM_TimeBaseStructure.Period = TimerPeriod - 1; //72M / 90 = 800K 48M/60 = 800K TimerPeriod;665=18k;TIM_TimeBaseStructure.ClkDiv = 0;TIM_TimeBaseStructure.RepetCnt = 0;TIM_InitTimeBase(TIM1, &TIM_TimeBaseStructure);/* Channel 3 Configuration in PWM mode */TIM_OCInitStructure.OcMode = TIM_OCMODE_PWM2;TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;TIM_OCInitStructure.OutputNState = TIM_OUTPUT_NSTATE_ENABLE;TIM_OCInitStructure.Pulse = Left_Small_Buffer[0]; //CCR1_Val;TIM_OCInitStructure.OcPolarity = TIM_OC_POLARITY_LOW;TIM_OCInitStructure.OcNPolarity = TIM_OCN_POLARITY_LOW;TIM_OCInitStructure.OcIdleState = TIM_OC_IDLE_STATE_SET;TIM_OCInitStructure.OcNIdleState = TIM_OC_IDLE_STATE_RESET;TIM_InitOc1(TIM1, &TIM_OCInitStructure);/* TIM1 TIM_DMA_CC1 DMA Request enable */TIM_EnableDma(TIM1, TIM_DMA_CC1, ENABLE);/* PWM1 Mode configuration: Channel2 */TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;TIM_OCInitStructure.Pulse = Left_Middle_Buffer[0];//CCR2_Val;TIM_InitOc2(TIM1, &TIM_OCInitStructure);TIM_EnableDma(TIM1, TIM_DMA_CC2, ENABLE);/* PWM1 Mode configuration: Channel3 */TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;TIM_OCInitStructure.Pulse = Left_Large_Buffer[0]; //CCR3_Val;TIM_InitOc3(TIM1, &TIM_OCInitStructure);TIM_EnableDma(TIM1, TIM_DMA_CC3, ENABLE);/* PWM1 Mode configuration: Channel4 */TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;TIM_OCInitStructure.Pulse = Left_Large_Buffer[0]; //CCR3_Val;TIM_InitOc4(TIM1, &TIM_OCInitStructure);TIM_EnableDma(TIM1, TIM_DMA_CC4, ENABLE);/* Main Output Enable */TIM_EnableCtrlPwmOutputs(TIM1, ENABLE);///* TIM1 enable counter */TIM_Enable(TIM1, ENABLE);/
#if 1/* TIM8 Peripheral Configuration --------------------------------------------*//* Time Base configuration */TIM_TimeBaseStructure.Prescaler = 0;TIM_TimeBaseStructure.CntMode = TIM_CNT_MODE_UP;TIM_TimeBaseStructure.Period = TimerPeriod - 1; //72M / 90 = 800K 48M/60 = 800K TimerPeriod;665=18k;TIM_TimeBaseStructure.ClkDiv = 0;TIM_TimeBaseStructure.RepetCnt = 0;TIM_InitTimeBase(TIM8, &TIM_TimeBaseStructure);/* Channel 3 Configuration in PWM mode */TIM_OCInitStructure.OcMode = TIM_OCMODE_PWM2;TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;TIM_OCInitStructure.OutputNState = TIM_OUTPUT_NSTATE_ENABLE;TIM_OCInitStructure.Pulse = Left_Small_Buffer[0]; //CCR1_Val;TIM_OCInitStructure.OcPolarity = TIM_OC_POLARITY_LOW;TIM_OCInitStructure.OcNPolarity = TIM_OCN_POLARITY_LOW;TIM_OCInitStructure.OcIdleState = TIM_OC_IDLE_STATE_SET;TIM_OCInitStructure.OcNIdleState = TIM_OC_IDLE_STATE_RESET;TIM_InitOc1(TIM8, &TIM_OCInitStructure);/* TIM8 TIM_DMA_CC1 DMA Request enable */TIM_EnableDma(TIM8, TIM_DMA_CC1, ENABLE);/* PWM1 Mode configuration: Channel2 */TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;TIM_OCInitStructure.Pulse = Left_Middle_Buffer[0];//CCR2_Val;TIM_InitOc2(TIM8, &TIM_OCInitStructure);TIM_EnableDma(TIM8, TIM_DMA_CC2, ENABLE); /* PWM1 Mode configuration: Channel3 */TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;TIM_OCInitStructure.Pulse = Left_Large_Buffer[0]; //CCR3_Val;TIM_InitOc3(TIM8, &TIM_OCInitStructure);TIM_EnableDma(TIM8, TIM_DMA_CC3, ENABLE);/* PWM1 Mode configuration: Channel4 */TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;TIM_OCInitStructure.Pulse = Left_Large_Buffer[0]; //CCR3_Val;TIM_InitOc4(TIM8, &TIM_OCInitStructure);TIM_EnableDma(TIM8, TIM_DMA_CC4, ENABLE); /* Main Output Enable */TIM_EnableCtrlPwmOutputs(TIM8, ENABLE);///* TIM8 enable counter */TIM_Enable(TIM8, ENABLE);/
#endif while (1){}
}/*** @brief Configures the DMA.*/
void DMA_Configuration(void)
{DMA_InitType DMA_InitStructure;
//TIM1-DMA////* DMA Channel1 Config */DMA_DeInit(DMA_CH1);DMA_InitStructure.PeriphAddr = (uint32_t)&TIM1->CCDAT1; //TIM1_CCR_Address;DMA_InitStructure.MemAddr = (uint32_t)Left_Small_Buffer;DMA_InitStructure.Direction = DMA_DIR_PERIPH_DST;DMA_InitStructure.BufSize = 3;DMA_InitStructure.PeriphInc = DMA_PERIPH_INC_DISABLE;DMA_InitStructure.DMA_MemoryInc = DMA_MEM_INC_ENABLE;DMA_InitStructure.PeriphDataSize = DMA_PERIPH_DATA_SIZE_HALFWORD;DMA_InitStructure.MemDataSize = DMA_MemoryDataSize_HalfWord;DMA_InitStructure.CircularMode = DMA_MODE_CIRCULAR;//DMA_MODE_CIRCULAR;DMA_InitStructure.Priority = DMA_PRIORITY_HIGH;DMA_InitStructure.Mem2Mem = DMA_M2M_DISABLE;DMA_Init(DMA_CH1, &DMA_InitStructure);DMA_RequestRemap(DMA_REMAP_TIM1_CH1, DMA, DMA_CH1, ENABLE); //DMA_REMAP_TIM1_UP DMA_REMAP_TIM1_CH1/* DMA Channel2 Config */DMA_DeInit(DMA_CH2);DMA_InitStructure.PeriphAddr = (uint32_t)&TIM1->CCDAT2; //TIM1_CCR_Address;DMA_InitStructure.MemAddr = (uint32_t)Left_Middle_Buffer;DMA_InitStructure.Direction = DMA_DIR_PERIPH_DST;DMA_InitStructure.BufSize = 3;DMA_InitStructure.PeriphInc = DMA_PERIPH_INC_DISABLE;DMA_InitStructure.DMA_MemoryInc = DMA_MEM_INC_ENABLE;DMA_InitStructure.PeriphDataSize = DMA_PERIPH_DATA_SIZE_HALFWORD;DMA_InitStructure.MemDataSize = DMA_MemoryDataSize_HalfWord;DMA_InitStructure.CircularMode = DMA_MODE_CIRCULAR;//DMA_MODE_CIRCULAR;DMA_InitStructure.Priority = DMA_PRIORITY_HIGH;DMA_InitStructure.Mem2Mem = DMA_M2M_DISABLE;DMA_Init(DMA_CH2, &DMA_InitStructure);DMA_RequestRemap(DMA_REMAP_TIM1_CH2, DMA, DMA_CH2, ENABLE);/* DMA Channel3 Config */DMA_DeInit(DMA_CH3);DMA_InitStructure.PeriphAddr = (uint32_t)&TIM1->CCDAT3; //TIM1_CCR_Address;DMA_InitStructure.MemAddr = (uint32_t)Left_Large_Buffer;DMA_InitStructure.Direction = DMA_DIR_PERIPH_DST;DMA_InitStructure.BufSize = 3;DMA_InitStructure.PeriphInc = DMA_PERIPH_INC_DISABLE;DMA_InitStructure.DMA_MemoryInc = DMA_MEM_INC_ENABLE;DMA_InitStructure.PeriphDataSize = DMA_PERIPH_DATA_SIZE_HALFWORD;DMA_InitStructure.MemDataSize = DMA_MemoryDataSize_HalfWord;DMA_InitStructure.CircularMode = DMA_MODE_CIRCULAR;//DMA_MODE_CIRCULAR;DMA_InitStructure.Priority = DMA_PRIORITY_HIGH;DMA_InitStructure.Mem2Mem = DMA_M2M_DISABLE;DMA_Init(DMA_CH3, &DMA_InitStructure);DMA_RequestRemap(DMA_REMAP_TIM1_CH3, DMA, DMA_CH3, ENABLE); //DMA_REMAP_TIM1_UP/* DMA Channel4 Config */DMA_DeInit(DMA_CH4);DMA_InitStructure.PeriphAddr = (uint32_t)&TIM1->CCDAT4; //TIM1_CCR_Address;DMA_InitStructure.MemAddr = (uint32_t)Left_Large_Buffer;DMA_InitStructure.Direction = DMA_DIR_PERIPH_DST;DMA_InitStructure.BufSize = 3;DMA_InitStructure.PeriphInc = DMA_PERIPH_INC_DISABLE;DMA_InitStructure.DMA_MemoryInc = DMA_MEM_INC_ENABLE;DMA_InitStructure.PeriphDataSize = DMA_PERIPH_DATA_SIZE_HALFWORD;DMA_InitStructure.MemDataSize = DMA_MemoryDataSize_HalfWord;DMA_InitStructure.CircularMode = DMA_MODE_CIRCULAR;//DMA_MODE_CIRCULAR;DMA_InitStructure.Priority = DMA_PRIORITY_HIGH;DMA_InitStructure.Mem2Mem = DMA_M2M_DISABLE;DMA_Init(DMA_CH4, &DMA_InitStructure);DMA_RequestRemap(DMA_REMAP_TIM1_CH4, DMA, DMA_CH4, ENABLE); //DMA_REMAP_TIM1_UP/* DMA Channel1 enable */DMA_EnableChannel(DMA_CH1, ENABLE);/* DMA Channel2 enable */DMA_EnableChannel(DMA_CH2, ENABLE);/* DMA Channel3 enable */DMA_EnableChannel(DMA_CH3, ENABLE);/* DMA Channel4 enable */DMA_EnableChannel(DMA_CH4, ENABLE);/TIM8-DMA//* DMA Channel1 Config */DMA_DeInit(DMA_CH5);DMA_InitStructure.PeriphAddr = (uint32_t)&TIM8->CCDAT1; //TIM1_CCR_Address;DMA_InitStructure.MemAddr = (uint32_t)Left_Small_Buffer;DMA_InitStructure.Direction = DMA_DIR_PERIPH_DST;DMA_InitStructure.BufSize = 3;DMA_InitStructure.PeriphInc = DMA_PERIPH_INC_DISABLE;DMA_InitStructure.DMA_MemoryInc = DMA_MEM_INC_ENABLE;DMA_InitStructure.PeriphDataSize = DMA_PERIPH_DATA_SIZE_HALFWORD;DMA_InitStructure.MemDataSize = DMA_MemoryDataSize_HalfWord;DMA_InitStructure.CircularMode = DMA_MODE_CIRCULAR;//DMA_MODE_CIRCULAR;DMA_InitStructure.Priority = DMA_PRIORITY_HIGH;DMA_InitStructure.Mem2Mem = DMA_M2M_DISABLE;DMA_Init(DMA_CH5, &DMA_InitStructure);DMA_RequestRemap(DMA_REMAP_TIM8_CH1, DMA, DMA_CH5, ENABLE); //DMA_REMAP_TIM1_UP DMA_REMAP_TIM1_CH1/* DMA Channel2 Config */DMA_DeInit(DMA_CH6);DMA_InitStructure.PeriphAddr = (uint32_t)&TIM8->CCDAT2; //TIM1_CCR_Address;DMA_InitStructure.MemAddr = (uint32_t)Left_Middle_Buffer;DMA_InitStructure.Direction = DMA_DIR_PERIPH_DST;DMA_InitStructure.BufSize = 3;DMA_InitStructure.PeriphInc = DMA_PERIPH_INC_DISABLE;DMA_InitStructure.DMA_MemoryInc = DMA_MEM_INC_ENABLE;DMA_InitStructure.PeriphDataSize = DMA_PERIPH_DATA_SIZE_HALFWORD;DMA_InitStructure.MemDataSize = DMA_MemoryDataSize_HalfWord;DMA_InitStructure.CircularMode = DMA_MODE_CIRCULAR;//DMA_MODE_CIRCULAR;DMA_InitStructure.Priority = DMA_PRIORITY_HIGH;DMA_InitStructure.Mem2Mem = DMA_M2M_DISABLE;DMA_Init(DMA_CH6, &DMA_InitStructure);DMA_RequestRemap(DMA_REMAP_TIM8_CH2, DMA, DMA_CH6, ENABLE);/* DMA Channel3 Config */DMA_DeInit(DMA_CH7);DMA_InitStructure.PeriphAddr = (uint32_t)&TIM8->CCDAT3; //TIM1_CCR_Address;DMA_InitStructure.MemAddr = (uint32_t)Left_Large_Buffer;DMA_InitStructure.Direction = DMA_DIR_PERIPH_DST;DMA_InitStructure.BufSize = 3;DMA_InitStructure.PeriphInc = DMA_PERIPH_INC_DISABLE;DMA_InitStructure.DMA_MemoryInc = DMA_MEM_INC_ENABLE;DMA_InitStructure.PeriphDataSize = DMA_PERIPH_DATA_SIZE_HALFWORD;DMA_InitStructure.MemDataSize = DMA_MemoryDataSize_HalfWord;DMA_InitStructure.CircularMode = DMA_MODE_CIRCULAR;//DMA_MODE_CIRCULAR;DMA_InitStructure.Priority = DMA_PRIORITY_HIGH;DMA_InitStructure.Mem2Mem = DMA_M2M_DISABLE;DMA_Init(DMA_CH7, &DMA_InitStructure);DMA_RequestRemap(DMA_REMAP_TIM8_CH3, DMA, DMA_CH7, ENABLE); //DMA_REMAP_TIM1_UP/* DMA Channel4 Config */DMA_DeInit(DMA_CH8);DMA_InitStructure.PeriphAddr = (uint32_t)&TIM8->CCDAT4; //TIM1_CCR_Address;DMA_InitStructure.MemAddr = (uint32_t)Left_Large_Buffer;DMA_InitStructure.Direction = DMA_DIR_PERIPH_DST;DMA_InitStructure.BufSize = 3;DMA_InitStructure.PeriphInc = DMA_PERIPH_INC_DISABLE;DMA_InitStructure.DMA_MemoryInc = DMA_MEM_INC_ENABLE;DMA_InitStructure.PeriphDataSize = DMA_PERIPH_DATA_SIZE_HALFWORD;DMA_InitStructure.MemDataSize = DMA_MemoryDataSize_HalfWord;DMA_InitStructure.CircularMode = DMA_MODE_CIRCULAR;//DMA_MODE_CIRCULAR;DMA_InitStructure.Priority = DMA_PRIORITY_HIGH;DMA_InitStructure.Mem2Mem = DMA_M2M_DISABLE;DMA_Init(DMA_CH8, &DMA_InitStructure);DMA_RequestRemap(DMA_REMAP_TIM8_CH4, DMA, DMA_CH8, ENABLE); //DMA_REMAP_TIM1_UP/* DMA Channel1 enable */DMA_EnableChannel(DMA_CH5, ENABLE);/* DMA Channel2 enable */DMA_EnableChannel(DMA_CH6, ENABLE);/* DMA Channel3 enable */DMA_EnableChannel(DMA_CH7, ENABLE);/* DMA Channel4 enable */DMA_EnableChannel(DMA_CH8, ENABLE);
}/*** @brief Configures the different system clocks.*/
void RCC_Configuration(void)
{/* TIM1 clock enable */RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_TIM1, ENABLE);/* TIM8 clock enable */RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_TIM8, ENABLE);/* GPIOA and GPIOB clock enable */RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA | RCC_APB2_PERIPH_GPIOB | RCC_APB2_PERIPH_AFIO, ENABLE);/* DMA clock enable */RCC_EnableAHBPeriphClk(RCC_AHB_PERIPH_DMA, ENABLE);
}/*** @brief Configure the TIM1 Pins.*/
void GPIO_Configuration(void)
{GPIO_InitType GPIO_InitStructure;
TIM1GPIO_InitStruct(&GPIO_InitStructure);/* GPIOA Configuration: Channel 1 as alternate function push-pull */GPIO_InitStructure.Pin = GPIO_PIN_4;GPIO_InitStructure.GPIO_Mode = GPIO_MODE_AF_PP;GPIO_InitStructure.GPIO_Current = GPIO_DC_LOW;GPIO_InitStructure.GPIO_Alternate = GPIO_AF3_TIM1;GPIO_InitPeripheral(GPIOA, &GPIO_InitStructure);/* GPIOA Configuration: Channel 2 as alternate function push-pull */GPIO_InitStructure.Pin = GPIO_PIN_3;GPIO_InitStructure.GPIO_Mode = GPIO_MODE_AF_PP;GPIO_InitStructure.GPIO_Current = GPIO_DC_LOW;GPIO_InitStructure.GPIO_Alternate = GPIO_AF3_TIM1;GPIO_InitPeripheral(GPIOA, &GPIO_InitStructure);/* GPIOA Configuration: Channel 3 as alternate function push-pull */GPIO_InitStructure.Pin = GPIO_PIN_5;GPIO_InitStructure.GPIO_Mode = GPIO_MODE_AF_PP;GPIO_InitStructure.GPIO_Current = GPIO_DC_LOW;GPIO_InitStructure.GPIO_Alternate = GPIO_AF3_TIM1;GPIO_InitPeripheral(GPIOA, &GPIO_InitStructure);/* GPIOA Configuration: Channel 4 as alternate function push-pull */GPIO_InitStructure.Pin = GPIO_PIN_11;GPIO_InitStructure.GPIO_Mode = GPIO_MODE_AF_PP;GPIO_InitStructure.GPIO_Current = GPIO_DC_LOW;GPIO_InitStructure.GPIO_Alternate = GPIO_AF2_TIM1;GPIO_InitPeripheral(GPIOA, &GPIO_InitStructure);TIM8GPIO_InitStruct(&GPIO_InitStructure);/* GPIOA Configuration: Channel 1 as alternate function push-pull */GPIO_InitStructure.Pin = GPIO_PIN_0;GPIO_InitStructure.GPIO_Mode = GPIO_MODE_AF_PP;GPIO_InitStructure.GPIO_Current = GPIO_DC_LOW;GPIO_InitStructure.GPIO_Alternate = GPIO_AF3_TIM8;GPIO_InitPeripheral(GPIOA, &GPIO_InitStructure);/* GPIOA Configuration: Channel 2 as alternate function push-pull */GPIO_InitStructure.Pin = GPIO_PIN_1;GPIO_InitStructure.GPIO_Mode = GPIO_MODE_AF_PP;GPIO_InitStructure.GPIO_Current = GPIO_DC_LOW;GPIO_InitStructure.GPIO_Alternate = GPIO_AF2_TIM8;GPIO_InitPeripheral(GPIOA, &GPIO_InitStructure);/* GPIOA Configuration: Channel 3 as alternate function push-pull */GPIO_InitStructure.Pin = GPIO_PIN_2;GPIO_InitStructure.GPIO_Mode = GPIO_MODE_AF_PP;GPIO_InitStructure.GPIO_Current = GPIO_DC_LOW;GPIO_InitStructure.GPIO_Alternate = GPIO_AF2_TIM8;GPIO_InitPeripheral(GPIOA, &GPIO_InitStructure);/* GPIOA Configuration: Channel 4 as alternate function push-pull */GPIO_InitStructure.Pin = GPIO_PIN_1;GPIO_InitStructure.GPIO_Mode = GPIO_MODE_AF_PP;GPIO_InitStructure.GPIO_Current = GPIO_DC_LOW;GPIO_InitStructure.GPIO_Alternate = GPIO_AF9_TIM8;GPIO_InitPeripheral(GPIOB, &GPIO_InitStructure);}#ifdef USE_FULL_ASSERT/*** @brief Reports the name of the source file and the source line number* where the assert_param error has occurred.* @param file pointer to the source file name* @param line assert_param error line source number*/
void assert_failed(const uint8_t* expr, const uint8_t* file, uint32_t line)
{/* User can add his own implementation to report the file name and line number,ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */while (1){}
}#endif/*** @}*//*** @}*/
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