1 typedef struct spinlock {
 2     union {
 3         struct raw_spinlock rlock;
 4 #ifdef CONFIG_DEBUG_LOCK_ALLOC
 5 #define LOCK_PADSIZE (offsetof(struct raw_spinlock, dep_map))
 6         struct {
 7             u8 __padding[LOCK_PADSIZE];
 8             struct lockdep_map dep_map;
 9         };
10 #endif
11     };
12 } spinlock_t;
13 typedef struct raw_spinlock {
14     arch_spinlock_t raw_lock;
15 #ifdef CONFIG_GENERIC_LOCKBREAK
16     unsigned int break_lock;
17 #endif
18 #ifdef CONFIG_DEBUG_SPINLOCK
19     unsigned int magic, owner_cpu;
20     void *owner;
21 #endif
22 #ifdef CONFIG_DEBUG_LOCK_ALLOC
23     struct lockdep_map dep_map;
24 #endif
25 } raw_spinlock_t;

 1 typedef struct {
 2     union {
 3         u32 slock;
 4         struct __raw_tickets {
 5 #ifdef __ARMEB__
 6             u16 next;
 7             u16 owner;
 8 #else
 9             u16 owner;
10             u16 next;
11 #endif
12         } tickets;
13     };
14 } arch_spinlock_t;

 1 #define raw_spin_lock(lock) _raw_spin_lock(lock)
 2 static inline void spin_lock(spinlock_t *lock)
 3 {
 4     raw_spin_lock(&lock->rlock);
 5 }
 6 #define raw_spin_unlock(lock) _raw_spin_unlock(lock)
 7 static inline void spin_unlock(spinlock_t *lock)
 8 {
 9     raw_spin_unlock(&lock->rlock);
10 }

 1 #ifndef CONFIG_INLINE_SPIN_LOCK
 2 void __lockfunc _raw_spin_lock(raw_spinlock_t *lock)
 3 {
 4     __raw_spin_lock(lock);
 5 }
 6 EXPORT_SYMBOL(_raw_spin_lock);
 7 #endif
 8 #ifndef CONFIG_UNINLINE_SPIN_UNLOCK
 9 #define _raw_spin_unlock(lock) __raw_spin_unlock(lock)
10 #endif
11 #if !defined(CONFIG_GENERIC_LOCKBREAK) || defined(CONFIG_DEBUG_LOCK_ALLOC)
12 static inline void __raw_spin_lock(raw_spinlock_t *lock)
13 {
14     preempt_disable();
15     spin_acquire(&lock->dep_map, 0, 0, _RET_IP_);
16     LOCK_CONTENDED(lock, do_raw_spin_trylock, do_raw_spin_lock);
17 }
18 #endif
19 static inline void __raw_spin_unlock(raw_spinlock_t *lock)
20 {
21     spin_release(&lock->dep_map, 1, _RET_IP_);
22     do_raw_spin_unlock(lock);
23     preempt_enable();
24 }

 1 static inline void do_raw_spin_lock(raw_spinlock_t *lock) __acquires(lock)
 2 {
 3     __acquire(lock);
 4     arch_spin_lock(&lock->raw_lock);
 5 }
 6 static inline void arch_spin_lock(arch_spinlock_t *lock)
 7 {
 8     unsigned long tmp;
 9     u32 newval;
10     arch_spinlock_t lockval;
11     __asm__ __volatile__(
12 "1: ldrex %0, [%3]\n"
13 "   add %1, %0, %4\n"
14 "   strex %2, %1, [%3]\n"
15 "   teq %2, #0\n"
16 "   bne 1b"
17     : "=&r" (lockval), "=&r" (newval), "=&r" (tmp)
18     : "r" (&lock->slock), "I" (1 << TICKET_SHIFT)
19     : "cc");
20     while (lockval.tickets.next != lockval.tickets.owner) {
21         wfe();
22         lockval.tickets.owner = ACCESS_ONCE(lock->tickets.owner);
23     }
24     smp_mb();
25 }
26 c03b0e90 <_raw_spin_lock>:
27 c03b0e90:   e1902f9f    ldrex r2, [r0]
28 c03b0e94:   e2823801    add r3, r2, #65536 ; 0x10000
29 c03b0e98:   e1801f93    strex r1, r3, [r0]
30 c03b0e9c:   e3310000    teq r1, #0
31 c03b0ea0:   1afffffa    bne c03b0e90 <_raw_spin_lock>
32 c03b0ea4:   e6ff3072    uxth r3, r2
33 c03b0ea8:   e7ef2852    ubfx r2, r2, #16, #16
34 c03b0eac:   e1520003    cmp r2, r3
35 c03b0eb0:   0a000003    beq c03b0ec4 <_raw_spin_lock+0x34>
36 c03b0eb4:   e320f002    wfe
37 c03b0eb8:   e1d030b0    ldrh r3, [r0]
38 c03b0ebc:   e6ff3073    uxth r3, r3
39 c03b0ec0:   eafffff9    b c03b0eac <_raw_spin_lock+0x1c>
40 c03b0ec4:   f57ff05f    dmb sy
41 c03b0ec8:   e12fff1e    bx lr

 1 static inline void do_raw_spin_unlock(raw_spinlock_t *lock) __releases(lock)
 2 {
 3     arch_spin_unlock(&lock->raw_lock);
 4     __release(lock);
 5 }
 6 static inline void arch_spin_unlock(arch_spinlock_t *lock)
 7 {
 8     smp_mb();
 9     lock->tickets.owner++;
10     dsb_sev();
11 }

1 struct semaphore {
2     raw_spinlock_t lock;
3     unsigned int count;
4     struct list_head wait_list;
5 };

 1 void down(struct semaphore *sem)
 2 {
 3     unsigned long flags;
 4     raw_spin_lock_irqsave(&sem->lock, flags);
 5     if (likely(sem->count > 0))
 6         sem->count--;
 7     else
 8         __down(sem);
 9     raw_spin_unlock_irqrestore(&sem->lock, flags);
10 }
11 EXPORT_SYMBOL(down);
12 static noinline void __sched __down(struct semaphore *sem)
13 {
14     __down_common(sem, TASK_UNINTERRUPTIBLE, MAX_SCHEDULE_TIMEOUT);
15 }
16 static inline int __sched __down_common(struct semaphore *sem, long state, long timeout)
17 {
18     struct task_struct *task = current;
19     struct semaphore_waiter waiter;
20     list_add_tail(&waiter.list, &sem->wait_list);
21     waiter.task = task;
22     waiter.up = false;
23     for (;;) {
24         if (signal_pending_state(state, task))
25             goto interrupted;
26         if (unlikely(timeout <= 0))
27             goto timed_out;
28         __set_task_state(task, state);
29         raw_spin_unlock_irq(&sem->lock);
30         timeout = schedule_timeout(timeout);
31         raw_spin_lock_irq(&sem->lock);
32         if (waiter.up)
33             return 0;
34     }
35  timed_out:
36     list_del(&waiter.list);
37     return -ETIME;
38  interrupted:
39     list_del(&waiter.list);
40     return -EINTR;
41 }

 1 signed long __sched schedule_timeout(signed long timeout)
 2 {
 3     struct timer_list timer;
 4     unsigned long expire;
 5     switch (timeout)
 6     {
 7     case MAX_SCHEDULE_TIMEOUT:
 8         schedule();
 9         goto out;
10     default:
11         if (timeout < 0) {
12             printk(KERN_ERR "schedule_timeout: wrong timeout value %lx\n", timeout);
13             dump_stack();
14             current->state = TASK_RUNNING;
15             goto out;
16         }
17     }
18     expire = timeout + jiffies;
19     setup_timer_on_stack(&timer, process_timeout, (unsigned long)current);
20     __mod_timer(&timer, expire, false, TIMER_NOT_PINNED);
21     schedule();
22     del_singleshot_timer_sync(&timer);
23     destroy_timer_on_stack(&timer);
24     timeout = expire - jiffies;
25  out:
26     return timeout < 0  0 : timeout;
27 }
28 EXPORT_SYMBOL(schedule_timeout);

 1 void up(struct semaphore *sem)
 2 {
 3     unsigned long flags;
 4     raw_spin_lock_irqsave(&sem->lock, flags);
 5     if (likely(list_empty(&sem->wait_list)))
 6         sem->count++;
 7     else
 8         __up(sem);
 9     raw_spin_unlock_irqrestore(&sem->lock, flags);
10 }
11 EXPORT_SYMBOL(up);
12 static noinline void __sched __up(struct semaphore *sem)
13 {
14     struct semaphore_waiter *waiter = \
15         list_first_entry(&sem->wait_list, struct semaphore_waiter, list);
16     list_del(&waiter->list);
17     waiter->up = true;
18     wake_up_process(waiter->task);
19 }

 1 int down_trylock(struct semaphore *sem)
 2 {
 3     unsigned long flags;
 4     int count;
 5     raw_spin_lock_irqsave(&sem->lock, flags);
 6     count = sem->count - 1;
 7     if (likely(count >= 0))
 8         sem->count = count;
 9     raw_spin_unlock_irqrestore(&sem->lock, flags);
10     return (count < 0);
11 }
12 EXPORT_SYMBOL(down_trylock);
13 int down_interruptible(struct semaphore *sem)
14 {
15     unsigned long flags;
16     int result = 0;
17     raw_spin_lock_irqsave(&sem->lock, flags);
18     if (likely(sem->count > 0))
19         sem->count--;
20     else
21         result = __down_interruptible(sem);
22     raw_spin_unlock_irqrestore(&sem->lock, flags);
23     return result;
24 }
25 EXPORT_SYMBOL(down_interruptible);

 1 #if __LINUX_ARM_ARCH__ >= 6
 2 static inline void atomic_add(int i, atomic_t *v)
 3 {
 4     unsigned long tmp;
 5     int result;
 6     __asm__ __volatile__("@ atomic_add\n"
 7 "1: ldrex %0, [%3]\n"
 8 "   add %0, %0, %4\n"
 9 "   strex %1, %0, [%3]\n"
10 "   teq %1, #0\n"
11 "   bne 1b"
12     : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter)
13     : "r" (&v->counter), "Ir" (i)
14     : "cc");
15 }
16 static inline int atomic_sub_return(int i, atomic_t *v)
17 {
18     unsigned long flags;
19     int val;
20     raw_local_irq_save(flags);
21     val = v->counter;
22     v->counter = val -= i;
23     raw_local_irq_restore(flags);
24     return val;
25 }
26 #else
27 #ifdef CONFIG_SMP
28 #error SMP not supported on pre-ARMv6 CPUs
29 #endif
30 static inline int atomic_add_return(int i, atomic_t *v)
31 {
32     unsigned long flags;
33     int val;
34     raw_local_irq_save(flags);
35     val = v->counter;
36     v->counter = val += i;
37     raw_local_irq_restore(flags);
38     return val;
39 }
40 #define atomic_add(i, v) (void) atomic_add_return(i, v)
41 static inline int atomic_sub_return(int i, atomic_t *v)
42 {
43     unsigned long flags;
44     int val;
45     raw_local_irq_save(flags);
46     val = v->counter;
47     v->counter = val -= i;
48     raw_local_irq_restore(flags);
49     return val;
50 }
51 #endif
52 #define atomic_inc(v) atomic_add(1, v)
53 #define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0)

1 #include <linux/linkage.h>
2 #include <asm/assembler.h>
3 #include "bitops.h"
4 .text
5 testop _test_and_clear_bit, bicne, strne

 1 #if __LINUX_ARM_ARCH__ >= 5
 2 .macro testop, name, instr, store
 3     ENTRY(\name)
 4     UNWIND(.fnstart)
 5     ands ip, r1, #3
 6     strneb r1, [ip]
 7     mov r2, #1
 8     and r3, r0, #31
 9     mov r0, r0, lsr #5
10     add r1, r1, r0, lsl #2
11     mov r3, r2, lsl r3
12     smp_dmb
13 1:  ldrex r2, [r1]
14     ands r0, r2, r3
15     \instr r2, r2, r3
16     strex ip, r2, [r1]
17     cmp ip, #0
18     bne 1b
19     smp_dmb
20     cmp r0, #0
21     movne r0, #1
22 2:  bx lr
23     UNWIND(.fnend)
24     ENDPROC(\name)
25 .endm
26 #else
27 .macro testop, name, instr, store
28     ENTRY(\name)
29     UNWIND(.fnstart)
30     ands ip, r1, #3
31     strneb r1, [ip]
32     and r3, r0, #31
33     mov r0, r0, lsr #5
34     save_and_disable_irqs ip
35     ldr r2, [r1, r0, lsl #2]!
36     mov r0, #1
37     tst r2, r0, lsl r3
38     \instr r2, r2, r0, lsl r3
39     \store r2, [r1]
40     moveq r0, #0
41     restore_irqs ip
42     mov pc, lr
43     UNWIND(.fnend)
44     ENDPROC(\name)
45 .endm
46 #endif