No.

Supported feature

Byte

Bit

0
1
2
3
4
5
6
7

3 slot packets
5 slot packets
Encryption
Slot offset
Timing accuracy
Role switch
Hold mode
Sniff mode

0
0
0
0
0
0
0
0

0
1
2
3
4
5
6
7

8
9
10
11
12
13
14
15

Park state
Power control requests
Channel quality driven data rate (CQDDR)
SCO link
HV2 packets
HV3 packets
ì-law log synchronous data
A-law log synchronous data

1
1
1
1
1
1
1
1

0
1
2
3
4
5
6
7

16
17
18
19
20
21
22
23

CVSD synchronous data
Paging parameter negotiation
Power control
Transparent synchronous data
Flow control lag (least significant bit)
Flow control lag (middle bit)
Flow control lag (most significant bit)
Broadcast Encryption

2
2
2
2
2
2
2
2

0
1
2
3
4
5
6
7

24
25

Reserved
Enhanced Data Rate ACL 2 Mb/s mode

3
3

26
27
28
29
30
31

Enhanced Data Rate ACL 3 Mb/s mode
Enhanced inquiry scan
Interlaced inquiry scan
Interlaced page scan
RSSI with inquiry results
Extended SCO link (EV3 packets)

3
3
3
3
3
3

2
3
4
5
6
7

32
33
34
35
36
37
38
39

EV4 packets
EV5 packets
Reserved
AFH capable slave
AFH classification slave
BR/EDR Not Supported
LE Supported (Controller)
3-slot Enhanced Data Rate ACL packets

4
4
4
4
4
4
4
4

0
1
2
3
4
5
6
7

40
41
42
43
44
45
46
47

5-slot Enhanced Data Rate ACL packets
Sniff subrating
Pause encryption
AFH capable master
AFH classification master
Enhanced Data Rate eSCO 2 Mb/s mode
Enhanced Data Rate eSCO 3 Mb/s mode
3-slot Enhanced Data Rate eSCO packets

5
5
5
5
5
5
5
5

0
1
2
3
4
5
6
7

48
49
50
51
52
53
54
55

Extended Inquiry Response
Simultaneous LE and BR/EDR to Same Device Capable
Reserved
Secure Simple Pairing
Encapsulated PDU
Erroneous Data Reporting
Non-flushable Packet Boundary Flag
Reserved

6
6
6
6
6
6
6
6

0
1
2
3
4
5
6
7

56

Link Supervision Timeout Changed Event

7

0

57
58
59
60
61
62
63

Inquiry TX Power Level
Enhanced Power Control
Reserved
Reserved
Reserved
Reserved
Extended features

7
7
7
7
7
7
7

1
2
3
4
5
6
7