28377D Bootloader

结构：上位机，28377D （Master）, 28035 （slaver）。

通信方式：SCI。

28377D bootloader 采用bootloader + app 模式。

每颗芯片对应的程序为bl + app, 也就是两个工程文件。

首先，bootloader 的编写，bl中的主要内容是SCI通信加flash烧写。

在bl中要对cmd文件进行修改，配置好app程序存放地址和版本相应空间。

具体程序配置如下：

MEMORY
{
PAGE 0 :  /* Program Memory *//* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation *//* BEGIN is used for the "boot to Flash" bootloader mode   */BEGIN             : origin = 0x080000, length = 0x000002RAMM0               : origin = 0x000122, length = 0x0002DERAMLS0              : origin = 0x008000, length = 0x001000RESET               : origin = 0x3FFFC0, length = 0x000002/* Flash sectors */FLASHA           : origin = 0x080002, length = 0x003FFE    /* on-chip Flash *///  FLASHB           : origin = 0x082000, length = 0x002000    /* on-chip Flash */APPSIZE          : origin = 0x088000, length = 0x000002     /* app size          */FLASHE           : origin = 0x088002, length = 0x007FFE   /* on-chip Flash */FLASHF           : origin = 0x090000, length = 0x008000    /* on-chip Flash */FLASHG           : origin = 0x098000, length = 0x008000    /* on-chip Flash */FLASHH           : origin = 0x0A0000, length = 0x008000    /* on-chip Flash */FLASHI           : origin = 0x0A8000, length = 0x008000    /* on-chip Flash */FLASHJ           : origin = 0x0B0000, length = 0x008000    /* on-chip Flash */FLASHK           : origin = 0x0B8000, length = 0x002000    /* on-chip Flash */FLASHL           : origin = 0x0BA000, length = 0x002000    /* on-chip Flash */FLASHM           : origin = 0x0BC000, length = 0x002000    /* on-chip Flash */FLASHN           : origin = 0x0BE000, length = 0x002000    /* on-chip Flash */   PAGE 1 : /* Data Memory *//* Memory (RAM/FLASH) blocks can be moved to PAGE0 for program allocation */BOOT_RSVD       : origin = 0x000002, length = 0x000120     /* Part of M0, BOOT rom will use this for stack */UPLOADREQ       : origin = 0x000400, length = 0x000004     /* on-chip RAM block M1         */RAMD0             : origin = 0x00B000, length = 0x000800RAMD1           : origin = 0x00B800, length = 0x000800RAMLS1      : origin = 0x009000, length = 0x002000// RAMLS3      : origin = 0x009800, length = 0x000800//RAMLS4      : origin = 0x00A000, length = 0x000800// RAMLS5      : origin = 0x00A800, length = 0x000800RAMGS0      : origin = 0x00C000, length = 0x001000RAMGS1      : origin = 0x00D000, length = 0x001000RAMGS2      : origin = 0x00E000, length = 0x001000RAMGS3      : origin = 0x00F000, length = 0x001000RAMGS4      : origin = 0x010000, length = 0x001000RAMGS5      : origin = 0x011000, length = 0x001000RAMGS6      : origin = 0x012000, length = 0x001000RAMGS7      : origin = 0x013000, length = 0x001000RAMGS8      : origin = 0x014000, length = 0x001000RAMGS9      : origin = 0x015000, length = 0x001000RAMGS10     : origin = 0x016000, length = 0x001000RAMGS11     : origin = 0x017000, length = 0x001000RAMGS12     : origin = 0x018000, length = 0x001000RAMGS13     : origin = 0x019000, length = 0x001000RAMGS14          : origin = 0x01A000, length = 0x001000RAMGS15          : origin = 0x01B000, length = 0x001000CPU2TOCPU1RAM   : origin = 0x03F800, length = 0x000400CPU1TOCPU2RAM   : origin = 0x03FC00, length = 0x000400
}SECTIONS
{/* Allocate program areas: */.cinit              : > FLASHA      PAGE = 0, ALIGN(4).pinit              : > FLASHA,     PAGE = 0, ALIGN(4).text               : >> FLASHA      PAGE = 0, ALIGN(4)AppSize             : > APPSIZE      PAGE = 0UpLoadReq         : > UPLOADREQ    PAGE = 1codestart           : > BEGIN       PAGE = 0, ALIGN(4)GROUP{ramfuncs{ -l F021_API_F2837xD_FPU32.lib}} LOAD = FLASHA,RUN  = RAMLS0,LOAD_START(_RamfuncsLoadStart),LOAD_SIZE(_RamfuncsLoadSize),LOAD_END(_RamfuncsLoadEnd),RUN_START(_RamfuncsRunStart),RUN_SIZE(_RamfuncsRunSize),RUN_END(_RamfuncsRunEnd),PAGE = 0, ALIGN(4)/* Allocate uninitalized data sections: */.stack              : > RAMD1        PAGE = 1.ebss               : >> RAMD1       PAGE = 1.esysmem            : > RAMD1        PAGE = 1/* Initalized sections go in Flash */.econst             : >> FLASHA      PAGE = 0, ALIGN(4).switch             : > FLASHA       PAGE = 0, ALIGN(4).reset              : > RESET,      PAGE = 0, TYPE = DSECT /* not used, */Filter_RegsFile     : > RAMD1,       PAGE = 1SHARE_C1TOC2       : > RAMGS7,          PAGE = 1SHARE_C2TOC1       : > RAMGS15,     PAGE = 1Cpu1Share2Cpu2   : > CPU1TOCPU2RAM,  PAGE = 1Cpu2Share2Cpu1   : > CPU2TOCPU1RAM,    PAGE = 1/* The following section definitions are required when using the IPC API Drivers */ GROUP : > CPU1TOCPU2RAM, PAGE = 1 {PUTBUFFER PUTWRITEIDX GETREADIDX }GROUP : > CPU2TOCPU1RAM, PAGE = 1{GETBUFFER :    TYPE = DSECTGETWRITEIDX :  TYPE = DSECTPUTREADIDX :   TYPE = DSECT}  }/*
//===========================================================================
// End of file.
//===========================================================================
*/

CMD文件完成后就是SCI通信，使用CommMonitor10.0.3和友善串口助手调试SCI。

bl调试完后就是APP编写了。

APP是应用程序，主要改变的是CMD和加入SCI通信功能。

// The user must define CLA_C in the project linker settings if using the
// CLA C compiler
// Project Properties -> C2000 Linker -> Advanced Options -> Command File
// Preprocessing -> --define
#ifdef CLA_C
// Define a size for the CLA scratchpad area that will be used
// by the CLA compiler for local symbols and temps
// Also force references to the special symbols that mark the
// scratchpad are.
CLA_SCRATCHPAD_SIZE = 0x100;
--undef_sym=__cla_scratchpad_end
--undef_sym=__cla_scratchpad_start
#endif //CLA_CMEMORY
{
PAGE 0 :   /* Program Memory *///BEGIN              : origin = 0x080000, length = 0x000002     /* BEGIN is used for the "boot to SARAM" bootloader mode   */RAMM0               : origin = 0x000122, length = 0x0002DE//RAMLS0         : origin = 0x008000, length = 0x000800     /* Local shared between CPU and CLA *///RAMLS1         : origin = 0x008800, length = 0x000800     /* Local shared between CPU and CLA *///RAMLS2         : origin = 0x009000, length = 0x000800     /* Local shared between CPU and CLA *///RAMLS3        : origin = 0x009800, length = 0x000800     /* Local shared between CPU and CLA */RAM_CLA          : origin = 0x008000, length = 0x002000//RAMLS0           : origin = 0x00A000, length = 0x000800    //add//RAMLS5         : origin = 0x00A800, length = 0x000800     /* Local shared between CPU and CLA *///RAMD0          : origin = 0x00B000, length = 0x000800//RAMD1          : origin = 0x00B800, length = 0x000800//RAMGS0         : origin = 0x00C000, length = 0x001000     /* Global shared between CPU1 and CPU2 *///RAMGS1         : origin = 0x00D000, length = 0x001000     /* Global shared between CPU1 and CPU2 */RAM_CPU         : origin = 0x00A800, length = 0x003800     /* Local shared between CPU and CLA *///RESET              : origin = 0x3FFFC0, length = 0x000002//FLASHA         : origin = 0x080002, length = 0x001FFE      /* on-chip Flash *///FLASHB         : origin = 0x082000, length = 0x002000    /* on-chip Flash *///FLASHC         : origin = 0x084000, length = 0x002000    /* on-chip Flash *///FLASHD         : origin = 0x086000, length = 0x002000    /* on-chip Flash *///FLASHE         : origin = 0x088000, length = 0x008000    /* on-chip Flash *///FLASHF         : origin = 0x090000, length = 0x008000    /* on-chip Flash */FLASH_BL         : origin = 0x080002, length = 0x003FFERESET            : origin = 0x088000, length = 0x000002BEGIN            : origin = 0x088002, length = 0x000002VERSION          : origin = 0x088004, length = 0x000002     /* Part of FLASHE.  Used for "boot to Flash" bootloader mode. */SIGNATURE1       : origin = 0x088006, length = 0x000002     /* Part of FLASHE.  Used for "boot to Flash" bootloader mode. */SIGNATURE2       : origin = 0x088008, length = 0x000002     /* Part of FLASHE.  Used for "boot to Flash" bootloader mode. */SIGNATURE3       : origin = 0x08800a, length = 0x000002     /* Part of FLASHE.  Used for "boot to Flash" bootloader mode. */VERSION2         : origin = 0x08800C, length = 0x000002VERSION3         : origin = 0x08800E, length = 0x000002//PROG             : origin = 0x082000, length = 0x016000PROG             : origin = 0x088010, length = 0x017FF0//FLASHG           : origin = 0x098000, length = 0x008000     /* on-chip Flash */FLASHH           : origin = 0x0A0000, length = 0x008000    /* on-chip Flash */FLASHI           : origin = 0x0A8000, length = 0x008000    /* on-chip Flash */FLASHJ           : origin = 0x0B0000, length = 0x008000    /* on-chip Flash */FLASHK           : origin = 0x0B8000, length = 0x002000    /* on-chip Flash */FLASHL           : origin = 0x0BA000, length = 0x002000    /* on-chip Flash */FLASHM           : origin = 0x0BC000, length = 0x002000    /* on-chip Flash */FLASHN           : origin = 0x0BE000, length = 0x002000    /* on-chip Flash */PAGE 1 :   /* Data Memory */BOOT_RSVD        : origin = 0x000002, length = 0x000120     /* Part of M0, BOOT rom will use this for stack */RAMM1            : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */RAMLS4           : origin = 0x00A000, length = 0x000800     /* Local shared between CPU and CLA */RAMGS0_1         : origin = 0x00C000, length = 0x002000     /* Global shared between CPU1 and CPU2 *///RAMGS2         : origin = 0x00E000, length = 0x001000     /* Global shared between CPU1 and CPU2 *///RAMGS3         : origin = 0x00F000, length = 0x001000     /* Global shared between CPU1 and CPU2 */RAMGS2_3         : origin = 0x00E000, length = 0x002000//RAMGS4         : origin = 0x010000, length = 0x001000     /* Global shared between CPU1 and CPU2 *///RAMGS5         : origin = 0x011000, length = 0x001000     /* Global shared between CPU1 and CPU2 *///RAMGS6         : origin = 0x012000, length = 0x001000     /* Global shared between CPU1 and CPU2 *///RAMGS7         : origin = 0x013000, length = 0x001000     /* Global shared between CPU1 and CPU2 *///RAMGS8         : origin = 0x014000, length = 0x001000     /* Global shared between CPU1 and CPU2 *///RAMGS9         : origin = 0x015000, length = 0x001000     /* Global shared between CPU1 and CPU2 *///RAMGS10        : origin = 0x016000, length = 0x001000     /* Global shared between CPU1 and CPU2 *///RAMGS11        : origin = 0x017000, length = 0x001000     /* Global shared between CPU1 and CPU2 *///RAMGS12        : origin = 0x018000, length = 0x001000     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. *///RAMGS13        : origin = 0x019000, length = 0x001000     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. *///RAMGS14        : origin = 0x01A000, length = 0x001000     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. *///RAMGS15        : origin = 0x01B000, length = 0x001000     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */RAMGS15          : origin = 0x01B000, length = 0x001000CLA1_MSGRAMLOW   : origin = 0x001480, length = 0x000080CLA1_MSGRAMHIGH  : origin = 0x001500, length = 0x000080UPP_TXMSGRAM     : origin = 0x006C00, length = 0x000200UPP_RXMSGRAM     : origin = 0x006E00, length = 0x000200CPU2TOCPU1RAM    : origin = 0x03F800, length = 0x000400CPU1TOCPU2RAM    : origin = 0x03FC00, length = 0x000400CANA_MSG_RAM     : origin = 0x049000, length = 0x000800CANB_MSG_RAM     : origin = 0x04B000, length = 0x000800
}SECTIONS
{/* Allocate program areas: */.cinit           : > PROG,       PAGE = 0, ALIGN(4).pinit           : > PROG,       PAGE = 0, ALIGN(4).text            : > PROG,       PAGE = 0, ALIGN(4)codestart        : > BEGIN,      PAGE = 0version          : > VERSION     PAGE = 0signature1       : > SIGNATURE1  PAGE = 0signature2       : > SIGNATURE2  PAGE = 0signature3       : > SIGNATURE3  PAGE = 0version2         : > VERSION2    PAGE = 0version3         : > VERSION3    PAGE = 0/* Allocate uninitalized data sections: */.stack           : > RAMM1,      PAGE = 1.ebss            : > RAMGS2_3,   PAGE = 1.esysmem         : > RAMGS2_3,   PAGE = 1/* Initalized sections go in Flash */.econst          : > PROG,       PAGE = 0, ALIGN(4).switch          : > PROG,       PAGE = 0, ALIGN(4).reset           : > RESET,      PAGE = 0, TYPE = DSECT /* not used, *//* CLA specific sections */Cla1Prog         : LOAD = PROG,RUN = RAM_CLA,LOAD_START(_Cla1funcsLoadStart),LOAD_END(_Cla1funcsLoadEnd),RUN_START(_Cla1funcsRunStart),LOAD_SIZE(_Cla1funcsLoadSize),PAGE = 0, ALIGN(4)Cla1ToCpuMsgRAM  : > CLA1_MSGRAMLOW,   PAGE = 1CpuToCla1MsgRAM  : > CLA1_MSGRAMHIGH,  PAGE = 1Cpu1ToCpu2MsgRAM : > RAMGS0_1,        PAGE = 1Cpu2ToCpu1MsgRAM : > RAMGS15,       PAGE = 1Cpu1Share2Cpu2   : > CPU1TOCPU2RAM,    PAGE = 1Cpu2Share2Cpu1   : > CPU2TOCPU1RAM,    PAGE = 1#ifdef __TI_COMPILER_VERSION__#if __TI_COMPILER_VERSION__ >= 15009000.TI.ramfunc : {} LOAD = PROG,RUN = RAM_CPU,LOAD_START(_RamfuncsLoadStart),LOAD_SIZE(_RamfuncsLoadSize),LOAD_END(_RamfuncsLoadEnd),RUN_START(_RamfuncsRunStart),RUN_SIZE(_RamfuncsRunSize),RUN_END(_RamfuncsRunEnd),PAGE = 0, ALIGN(4)#elseramfuncs         : LOAD = PROG,RUN = RAM_CPU,LOAD_START(_RamfuncsLoadStart),LOAD_SIZE(_RamfuncsLoadSize),LOAD_END(_RamfuncsLoadEnd),RUN_START(_RamfuncsRunStart),RUN_SIZE(_RamfuncsRunSize),RUN_END(_RamfuncsRunEnd),PAGE = 0, ALIGN(4)#endif
#endif#ifdef CLA_C/* CLA C compiler sections *///// Must be allocated to memory the CLA has write access to//CLAscratch       :{ *.obj(CLAscratch). += CLA_SCRATCHPAD_SIZE;*.obj(CLAscratch_end) } >  RAMLS4,  PAGE = 1.scratchpad      : > RAMLS4,       PAGE = 1.bss_cla            : > RAMLS4,       PAGE = 1.const_cla        :  LOAD = PROG,RUN = RAMLS4,RUN_START(_Cla1ConstRunStart),LOAD_START(_Cla1ConstLoadStart),LOAD_SIZE(_Cla1ConstLoadSize),PAGE = 1
#endif //CLA_C
}/*
//===========================================================================
// End of file.
//===========================================================================
*/

配置好app所在地址和版本地址。

app文件使用的是HEX文件，生成需使用hex2000.exe。

在build设置中调用批处理，产生hex文件。

D:\TI\ccsv6\tools\compiler\c2000_15.12.3.LTS\bin\hex2000.exe -i -romwidth 16 -o E:\ccs82\**\*.hex E:\ccs82\**\*.out

为使文件更清晰烧入更安全，对hex文件进行处理，加入版本号和crc校验码，

在烧入完成后，计算的crc值和保存的crc值进行比较，验证程序是否完整。

调试过程中遇到的问题：

1，当CPU主频为200M时，在烧入flash过程中会出现死机现象，

把Fapi_initializeAPI(F021_CPU0_BASE_ADDRESS, 150);//200

改为150M后，可正常烧入，怀疑是晶振精度问题。

2，CPU 从bl跳转到app时，cpu进入非法中断，在TI官网查了很久，

发现是硬件的boot mode 被改了，复位后进入等待。

把 boot pin 改好后，可正常跳转。

APP可以使用简单的亮灯程序，其中不能有 IPCBootCPU2(C1C2_BROM_BOOTMODE_BOOT_FROM_FLASH)。

调试时可进入flash看程序和HEX文件有没有对应上。

一步一步调试。

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