1. platform创建

在file->new->other中选择new platform 创建平台文件，平台文件的名字通常以ti.platform.xxx方式进行命名，创建完成之后会直接在保存的位置形成文件夹的方式，而平台的配置信息可以在Platform.xdc文件中进行查看；

1. ti系统自带的平台文件ti.platforms.evmOMAPL138;

package ti.platforms.evmOMAPL138;

metaonly module Platform inherits xdc.platform.IPlatform

{

readonly config xdc.platform.IPlatform.Board BOARD = {

id:             "0",

boardName:      "evmOMAPL138",

boardFamily:    "evmOMAPL138",

boardRevision:  null,

};

readonly config xdc.platform.IExeContext.Cpu DSP = {

id:             "0",

clockRate:      300.0,

catalogName:    "ti.catalog.c6000",

deviceName:     "OMAPL138",

revision:       "",

};

readonly config xdc.platform.IExeContext.Cpu GPP = {

id:             "1",

clockRate:      300.0,

catalogName:    "ti.catalog.arm",

deviceName:     "OMAPL138",

revision:       "1.0",

};

instance:

/*

*  DDR is 128MByte but we need to share it with Arm.

*  Reserve 32MB for Arm/Linux (base: 0xC000000)

*  16MB for shared Arm/DSP (base: 0xC2000000)

*  16MB for DSP (base: 0xC3000000)

*  64MB for ARM (base: 0xC4000000)

*/

override readonly config xdc.platform.IPlatform.Memory

externalMemoryMap[string] = [

["DDR",  {name: "DDR",  base: 0xC3000000, len: 0x01000000}],

];

/*

*  ======== sectMap ========

*  Define a placement of compiler generated output sections into

*  memory regions defined in the memTab above.

*/

override config string codeMemory = "DDR";

override config string dataMemory = "DDR";

override config string stackMemory = "DDR";

/*

*  ======== l1PMode ========

*  Define the amount of L1P RAM used for L1 Program Cache.

*

*  Check the device documentation for valid values.

*/

config String l1PMode = "32k";

/*

*  ======== l1DMode ========

*  Define the amount of L1D RAM used for L1 Data Cache.

*

*  Check the device documentation for valid values.

*/

config String l1DMode = "32k";

/*

*  ======== l2Mode ========

*  Define the amount of L2 RAM used for L2 Cache.

*

*  Check the device documentation for valid values.

*/

config String l2Mode = "0k";

};

这样一个平台文件中包含了两个cpu设置，一个是DSP，另一个是ARM，这里对内存分配的设置比较简单，具体的设置是通过静态设置的方式进行设置的，这是config.bld文件，

var Build = xdc.useModule('xdc.bld.BuildEnvironment');

/*  Memory Map for ti.platforms.evmOMAPL138

*

*  C000_0000 - C7FF_FFFF   800_0000  ( 128 MB) External Memory

*  ------------------------------------------------------------------------

*  C000_0000 - C1FF_FFFF   200_0000  (  32 MB) Linux

*  C200_0000 - C200_FFFF     1_0000  (  64 KB) SR_0 (ipc)

*  C201_0000 - C2FF_FFFF    FF_0000  ( ~15 MB) SR_1 (program shared region)

*  C300_0000 - C37F_FFFF    80_0000  (   8 MB) DSP_PROG (code, data)

*  C380_0000 - C3FF_FFFF    80_0000  (   8 MB) --------

*  C400_0000 - C7FF_FFFF   400_0000  (  64 MB) Linux

*/

var SR_0 = {

name: "SR_0", space: "data", access: "RWX",

base: 0xC2000000, len: 0x10000,

comment: "SR#0 Memory (64 KB)"

};

var SR_1 = {

name: "SR_1", space: "data", access: "RWX",

base: 0xC2010000, len: 0xFF0000,

comment: "SR#1 Memory (15 MB)"

};

Build.platformTable["ti.platforms.evmOMAPL138:dsp"] = {

externalMemoryMap: [

[ SR_0.name, SR_0 ],

[ SR_1.name, SR_1 ],

[ "DSP_PROG", {

name: "DSP_PROG", space: "code/data", access: "RWX",

base: 0xC3000000, len: 0x800000,

comment: "DSP Program Memory (8 MB)"

}]

],

codeMemory:  "DSP_PROG",

dataMemory:  "DSP_PROG",

stackMemory: "DSP_PROG",

l1DMode: "32k",

l1PMode: "32k",

l2Mode: "32k"

};

可以看出这里对ddr内存进行了详细的分类，内存分配为三个部分，这样才能进行数据通讯以及双核模块的通讯。

1. 自己创建的平台文件;

metaonly module Platform inherits xdc.platform.IPlatform {

config ti.platforms.generic.Platform.Instance CPU =

ti.platforms.generic.Platform.create("CPU", {

clockRate:      456,

catalogName:    "ti.catalog.c6000",

deviceName:     "OMAPL138",

customMemoryMap:

[

["IRAM",

{

name: "IRAM",

base: 0x11800000,

len: 0x38000,

space: "code/data",

access: "RWX",

}

],

["IROM",

{

name: "IROM",

base: 0x11700000,

len: 0x00100000,

space: "code/data",

access: "RX",

}

],

["L3_CBA_RAM",

{

name: "L3_CBA_RAM",

base: 0x80000000,

len: 0x00020000,

space: "code/data",

access: "RWX",

}

],

["SR_0",

{

name: "SR_0",

base: 0xc2000000,

len: 0x10000,

space: "code/data",

access: "RWX",

}

],

["SR_1",

{

name: "SR_1",

base: 0xc2010000,

len: 0xa00000,

space: "code/data",

access: "RWX",

}

],

["DSP_PROG",

{

name: "DSP_PROG",

base: 0xc3000000,

len: 0x800000,

space: "code/data",

access: "RWX",

}

],

],

l2Mode: "0k",

l1PMode: "32k",

l1DMode: "32k",

});

instance :

override config string codeMemory  = "DSP_PROG";

override config string dataMemory  = "DSP_PROG";

override config string stackMemory = "DSP_PROG";

config String l2Mode = "0k";

config String l1PMode = "32k";

config String l1DMode = "32k";

}

这里只创建了一个平台，对于ti默认的package则可以选择CPU为DSP和GPP两种，这里暂时不讨论如何进行创建（主要是不知道。。。），可以对比，自己创建的平台文件与系统自带的文件区别是更详细的配置，但是这些配置并没有起到应有的作用，因为config.bld文件的静态配置与package的内存配置都存在的时候默认会采用静态配置。

1. 修改cfg与bld文件，修改makefile文件-p ti.platforms.evmOMAPL138:dsp -b ../shared/config.bld 为-p ti.platforms.C6748 -b ../shared/config.bld ，将bld文件中的关于ti.platforms.evmOMAPL138:dsp平台修改ti.platforms.C6748，之前在平台文件这里出现过错误，cfg文件提示没有SR_0和SR_1（提示未定义），我们从package文件中已经看到它并没有设置SR_0和SR_1内存分配向而这些是在bld中进行静态设置的，所以会出现错误提示，这里我们自己创建的package文件则不会存在这种问题，但是为了保持静态配置内容有效，因此我们这里仍然将bld文件的平台修改为我们自己创建的平台。

2.内存配置

0x0080 0000 - 0x0083 FFFF 256K DSP L2_RAM

这个地址是DSP的私有地址，L2_RAM是c6748的二级缓存RAM；

0x1180 0000 - 0x1183 FFFF 256K DSP L2_RAM

而这个地址是DSP在总线上的地址，只有这个地址才能被DSP核心和所有外设进行访问，需要经过总线，会对速度有少量影响；

缓存的配置可以在创建packages时设定，也可以在sysbios创建的cfg文件时设定，这里cfg文件设定的缓存配置优先级高，如果两者都配置的话会优先采用sysbios里面的配置；

在打开cfg配置文件的Available Products窗口中可以在other Products选项中查看平台的配置文件。