RRAM/ Near Memory Computing (NMC) Survey

最近在做近存储计算方面的调研，主要关注RRAM在近存储计算方面的发展情况和前景，这个系列是阅读笔记，比较杂乱。系统些的小结会放到其他栏目中

Near-memory computing: Past, present, and future

Abstract

The conventional approach of moving data to the CPU for computation has become a significant performance bottleneck for emerging scale-out data-intensive applications due to their limited data reuse.

The advancement in 3D integration technologies has made the decade-old concept of coupling compute units close to the memory - called near-memory computing (NMC) - more viable.

1. Introduction

memory wall: memory technology has not been able to keep up with advancements in processor technology in terms of latency and energy consumption.

memory hierarchies

Dennard scaling ???

applocations exhibit massive data parallelism and low operational intensity with a limited locality.

NMC: aims at processing close to where the data resides.

three-dimensional stacking: true enabler of precessing close to the memory. Allows the stacking of logic and memory together using through silicon via’s (TSV) that helps in reducing memory access latency, power consumption and provides much higher bandwidth.

competing products in the 3D memory arena:

Micron: Hybrid Memory Cube (HMC)
AMD and Hynix: High Bandwidth Memory (HBM)
Samsumg: Wide I/O

paper structure:

section 2: a historical overview of near-memory computing and related work
section 3, 4, 5: evaluation and classification scheme for NMC at main memory
section 6: challenges with cache coherence, virtual memory, the lack of programming models, and data mapping schemes for NMC.
section 7: tools and techiniques used to perform the design space exploration for these systems.
section 8: their approach to near-memory computing.
section 9: the lessons learned and future research directions

2. Background and related work

Idea: 1960s

First appearance: 1990s, Vector IRAM (VIRAM)

the reason of resurgence:

techonological advancements in 3D and 2.5D stacking (blends logic and memory in the same package)
sidestepping the performance and energy buttlenecks
advent of modern data-intensive applications

manifested with names: processing-in memory(PIM), near-data processing(NDP), near-memory processing (NMP), in-storage processing(ISP)

3. Classification and evaluation

Introduces the classification and evaluation metrics that are used in Section 4 & 5.

Memory - The decision of using what kind of memory
Processing - Processing unit implemented, and the granularity of processing it
Tool - Tool infrastructure
Interoperability（互用性）
Application

感觉前两个是用来分类的，这些都可以用来评价。

4. Processing near main memory

使用programmable processing unit的有若干，使用fixed-function processing unit的也有若干。

5. Processing near storage class memory

分为Fixed-function unit, programmable unit和 re-configurable unit

6. Challenges of near-memory computing

Virtual memory support
Cache coherence
Programming Model
Data mapping

7. Design space exploration for NMC

8. Practicalities of near-memory computing

An 8-bit RRAM based Multiplier for Hybrid Memory Computing

0. Abstract

Hybrid-memory computing can reconcile the speed of in-memory computing and the power of near-memory. The simulation results show that the proposed RRAM based multiplier achieves a calculation speed of 1.6us and 1.32 mW from 1V power supply.

1. Introduction

In a hybrid-memory computing process, the data will be processed in memory firstly

and then in the circuit near memory.

In-Memory Computing: the next generation AI computing paradigm

IMC Based on Emerging NVM

NVM is demonstrated not only to serve as memory macro, but also in the computing operations, such as matrix-matrix, matrix-vector multiplication, convolution, etc.

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Flash Memory-Based

Inherently analog.

advantages: mature fabrication process, ready for large-volume integration.

Yet, commercial flash memories are optimized for digital storage applications and require circuit-level physical design modifications to enable high-precision analog threshold voltage tuning. Its incompatibility with state-of-the-art standard logic CMOS technology in terms of technology nodes and operation voltage levels also limits the application and the level of integration.

ReRAM-based

none-volatile memory with near-zero leakage energy and high density. Moreover, with its crossbar array structure, ReRAM can perform the matrix-vector multiplication efficiently. ReRAM can perform MAC operations efficiently in a crossbar structure and has been widely studied to represent synapses in the neural network computation.

Compare to SRAM and DRAM, ReRAM has high write energy and latency, which increases the overall power consumption and decreases the weight updating speed.

STT-MRAM-Based

Spin-Toque Transfer Magnetic Random Access Memory are promising substitutes for SRAM to reduce standby power. Among different types of NVMs, STT-MRAM is the most preferable due to its unique characteristics like high density and near-zero power leakage. Faces some distinct relability challenges involving storage failures.

PCM-Based

A Phase-Change Memory device can be programmed to a certain desired resistance value through iterative programming by applying several pulses in a closed-loop manner.