DA14580蓝牙硬件系统总览（二）

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3.6 INTERFACES 接口

3.6.1 UARTS （串口）

The UART is compliant to the industry-standard 16550 and is used for serial communication with a peripheral, modem (data carrier equipment, DCE) or data set.

UART符合行业标准16550，并用于与外围设备，调制解调器（数据载体设备，DCE）或数据集进行串行通信。

Data is written from a master (CPU) over the APB bus to the UART and it is converted to serial form and transmitted to the destination device. Serial data is also received by the UART and stored for the master (CPU) to read back.

数据通过APB总线从主机（CPU）写入UART，并转换为串行形式并传输到目标设备。串行数据也由UART接收并存储以供主机（CPU）读回。

There is no DMA support on the UART block since its contains internal FIFOs. Both UARTs support hardware flow control signals (RTS, CTS, DTR, DSR).

UART模块不支持DMA，因为它包含内部FIFO。两个UART都支持硬件流控制信号（RTS，CTS，DTR，DSR）。

Features 特色

• 16 bytes Transmit and receive FIFOs
•16字节发送和接收FIFO

• Hardware flow control support (CTS/RTS)
•硬件流控制支持（CTS / RTS）

• Shadow registers to reduce software overhead and also include a software programmable reset
•影子寄存器可减少软件开销，并且还包括软件可编程复位

• Transmitter Holding Register Empty (THRE) interrupt mode
•发送器保持寄存器为空（THRE）中断模式

• IrDA 1.0 SIR mode supporting low power mode.
•IrDA 1.0 SIR模式支持低功耗模式。

• Functionality based on the 16550 industry standard:
•基于16550行业标准的功能：

• Programmable character properties, such as number of data bits per character (5-8), optional
•可编程字符属性，例如每个字符的数据位数（5-8），可选

• parity bit (with odd or even select) and number of stop bits (1, 1.5 or 2)
•奇偶校验位（具有奇数或偶数选择）和停止位的数量（1、1.5或2）

• Line break generation and detection
•断行的生成和检测

• Prioritized interrupt identification
•优先中断识别

• Programmable serial data baud rate as calculated by the following: baud rate = (serial clock frequency)/(divisor).
•可编程串行数据波特率，计算方法如下：波特率=（串行时钟频率）/（除数）。

3.6.2 SPI+ （SPI接口）

This interface supports a subset of the Serial Peripheral Interface SPITM. The serial interface can transmit and receive 8, 16 or 32 bits in master/slave mode and transmit 9 bits in master mode. The SPI + interface has enhanced functionality with bidirectional 2x16-bit word FIFOs. SPI™ is a trademark of Motorola, Inc.
该接口支持串行外围接口SPITM的子集。串行接口在主/从模式下可以发送和接收8位，16位或32位，在主模式下可以发送9位。 SPI +接口具有双向2x16位字FIFO的增强功能。SPI™是Motorola，Inc.的商标。

Features 特色

• Slave and Master mode
•从模式和主模式

• 8 bit, 9 bit, 16 bit or 32 bit operation
•8位，9位，16位或32位操作

• Clock speeds upto 16 MHz for the SPI controller.
•SPI控制器的时钟速度高达16 MHz。

Programmable output frequencies of SPI source clock divided by 1, 2, 4, 8
SPI源时钟的可编程输出频率分频系数1，2，4，8

• SPI clock line speed up to 8 MHz
•SPI时钟线速度高达8 MHz

• SPI mode 0, 1, 2, 3 support (clock edge and phase)
•SPI模式0、1、2、3支持（时钟沿和相位）

• Programmable SPI_DO idle level
•可编程的SPI_DO空闲级别

• Maskable Interrupt generation
•可屏蔽的中断产生

• Bus load reduction by unidirectional writes-only and reads-only modes.
•通过单向只写和只读模式减少总线负载。

Built-in RX/TX FIFOs for continuous SPI bursts.
内置的RX / TX FIFO用于连续的SPI突发。

3.6.3 I2C interface （I2C接口）

The I2C interface is a programmable control bus that provides support for the communications link between Integrated Circuits in a system. It is a simple two-wire bus with a software-defined protocol for system control, which is used in temperature sensors and voltage level translators to EEPROMs, general-purpose I/O, A/D and D/A converters.
I2C接口是可编程控制总线，为系统中集成电路之间的通信链接提供支持。它是一条简单的两线总线，带有用于系统控制的软件定义协议，可用于温度传感器和EEPROM，通用I/O，A/D和D/A转换器。

Features 特色
• Two-wire I2C serial interface consists of a serial data line (SDA) and a serial clock (SCL)
• Two speeds are supported:
• Standard mode (0 to 100 kbit/s)
• Fast mode (<= 400 kbit/s)
• Clock synchronization
• 32 deep transmit/receive FIFOs
• Master transmit, Master receive operation
• 7 or 10-bit addressing
• 7 or 10-bit combined format transfers
• Bulk transmit mode
• Default slave address of 0x055
• Interrupt or polled-mode operation
• Handles Bit and Byte waiting at both bus speeds
• Programmable SDA hold time

•两线制I2C串行接口由串行数据线（SDA）和串行时钟（SCL）组成
•支持两种速度：
•标准模式（0到100 kbit / s）
•快速模式（<= 400 kbit / s）
•时钟同步
•32个深度发送/接收FIFO
•主站发送，主站接收操作
•7位或10位寻址
•7位或10位组合格式传输
•批量传输模式
•默认从站地址0x055
•中断或轮询模式操作
•处理两种总线速度下的位和字节等待
•可编程的SDA保持时间

3.6.4 General purpose ADC

The DA14580 is equipped with a high-speed ultra low power 10-bit general purpose Analog-to-Digital Converter (GPADC). It can operate in unipolar (single ended) mode as well as in bipolar (differential) mode.The ADC has its own voltage regulator (LDO) of 1.2 V,which represents the full scale reference voltage.

DA14580配备了高速超低功耗10位通用模数转换器（GPADC）。它既可以在单极性（单端）模式下工作，也可以在双极性（差分）模式下工作。ADC拥有自己的1.2 V稳压器（LDO），代表了满量程基准电压。

Features 特色
• 10-bit dynamic ADC with 65 ns conversion time
• Maximum sampling rate 3.3 Msample/s
• Ultra low power (5 uA typical supply current at 100 ksample/s)
• Single-ended as well as differential input with two input scales
• Four single-ended or two differential external input channels
• Battery monitoring function
• Chopper function
• Offset and zero scale adjust
• Common-mode input level adjust

•转换时间为65 ns的10位动态ADC
•最大采样率3.3 Msample / s
•超低功耗（100 ksample / s时，典型电源电流为5uA）
•具有两个输入比例的单端和差分输入
•四个单端或两个差分外部输入通道
•电池监控功能
•斩波功能
•偏移和零刻度调整
•共模输入电平调整

3.6.5 Quadrature decoder （正交解码器）

This block decodes the pulse trains from a rotary encoder to provide the step and the direction of the movement of an external device. Three axes (X, Y, Z) are supported.

该块对来自旋转编码器的脉冲序列进行解码，以提供外部设备运动的步长和方向。支持三个轴（X，Y，Z）。

The integrated quadrature decoder can automatically decode the signals for the X, Y and Z axes of a HID input device, reporting step count and direction: the channels are expected to provide a pulse train with 90 degrees phase difference; depending on whether the reference channel is leading or lagging, the direction can be determined.

集成的正交解码器可以自动解码HID输入设备的X，Y和Z轴的信号，报告步数和方向：期望通道提供相位差为90度的脉冲序列；根据参考通道是领先还是落后，可以确定方向。

This block can be used for waking up the chip as soon as there is any kind of movement from the external device connected to it.

一旦与之连接的外部设备发生任何形式的移动，此模块即可用于唤醒芯片。

Features 特色
• Three 16-bit signed counters that provide the step count and direction on each of the axes (X, Y and Z)
• Programmable system clock sampling at maximum 16 MHz.
• APB interface for control and programming
• Programmable source from P0, P1 and P2 ports
• Digital filter on the channel inputs to avoid spikes
•三个16位带符号计数器，它们在每个轴（X，Y和Z）上提供步数和方向
•可编程系统时钟采样最大为16 MHz。
•用于控制和编程的APB接口
•可从P0，P1和P2端口编程的信号源
•通道输入上的数字滤波器，以避免尖峰

3.6.6 Keyboard controller（键盘控制器）

The Keyboard controller can be used for debouncing the incoming GPIO signals when implementing a keyboard scanning engine. It generates an interrupt to the CPU (KEYBR_IRQ).

在实现键盘扫描引擎时，键盘控制器可用于对传入的GPIO信号进行去抖动。它会向CPU（KEYBR_IRQ）产生一个中断。

In parallel, five extra interrupt lines can be triggered by a state change on 32 selectable GPIOs (GPIOx_IRQ).

并行地，可以通过32个可选GPIO（GPIOx_IRQ）上的状态改变来触发5条额外的中断线。

Features 特色
• Monitors any of the 32 available GPIOs (12 in the WLCSP package, 22 in the QFN40 and 32 in the QFN48)
• Generates a keyboard interrupt on key press or key release
• Implements debouncing time from 0 upto 63 ms
• Supports five separate interrupt generation lines from GPIO toggling
•监视32个可用GPIO中的任何一个（WLCSP封装中的12个，QFN40中的22个和QFN48中的32个）
•在按键或释放按键时产生键盘中断
•实现从0到63 ms的去抖动时间
•从GPIO切换支持5条独立的中断生成线

3.6.7 Input/output ports （输入/输出端口）

The DA14580 has software-configurable I/O pin assignment, organized into ports Port 0, Port1, Port2 and Port 3. Port 2 is only available at the QFN40 package while ports 2 and 3 are available at the QFN48 package.

DA14580具有软件可配置的I/O引脚分配，分为Port0，Port1，Port2和Port3。Port2仅在QFN40封装中可用，而Port2和Port3在QFN48封装中可用。

Features 特色
• Port 0: 8 pins, Port 1: 6 pins (including SW_CLK and SWDIO), Port 2: 10 pins, Port 3: 8 pins
• Fully programmable pin assignment
• Selectable 25 kΩpull-up, pull-down resistors per pin
• Pull-up voltage either VBAT3V (BUCK mode) or VBAT1V (BOOST mode) configurable per pin
• Fixed assignment for analog pin ADC[3:0]
• Pins retain their last state when system enters the Extended or Deep Sleep mode.
•Port 0：8引脚，Port 1：6引脚（包括SW_CLK和SWDIO），Port 2：10引脚，Port 3：8引脚
•完全可编程的引脚分配
•每个引脚可选25kΩ上拉，下拉电阻
•每个引脚均可配置上拉电压VBAT3V（降压模式）或VBAT1V（升压模式）
•模拟引脚ADC [3：0] 固定分配
•当系统进入扩展或深度睡眠模式时，引脚保持其最后状态。