Aurix 多核链接文件 lsl --- 下篇

/* 接上篇 */

/*首先认识一下缩写

默认sections

.text 代码section

.data 需要初始化的数据

.bss 不需要初始化的数据

.rodata 存储的只读数据

.version_info 编译器相关信息

/*什么是小地址，flash 逐步细分分区

flash ->segment -> sector ->paragraph ->sections，

这里的sections 就是小地址 (个人理解，可能有误)*/

小地址sections

.sdata 需要初始化的数据

.sbss 不需要初始化的数据

.sdata2 存储的只读数据

绝对地址sections

.zdata 需要初始化的数据，可以存放在绝对的地址里面

.zbss 不需要初始化的数据，可以存放在绝对的地址里面

.zrodata 只读数据，可以存放在绝对的地址里面

/*根据上面注释，理解下面把对应的数据放在对应的区域里*/

/*Near Abbsolute Addressable Data Sections*/

section_layout :vtc:abs18

{

/*Near Absolute Data, selectable with patterns and user defined sections*/

group

{

group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram5)

{

select "(.zdata.zdata_cpu5|.zdata.zdata_cpu5.*)";

select "(.zbss.zbss_cpu5|.zbss.zbss_cpu5.*)";

}

group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram4)

{

select "(.zdata.zdata_cpu4|.zdata.zdata_cpu4.*)";

select "(.zbss.zbss_cpu4|.zbss.zbss_cpu4.*)";

}

group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram3)

{

select "(.zdata.zdata_cpu3|.zdata.zdata_cpu3.*)";

select "(.zbss.zbss_cpu3|.zbss.zbss_cpu3.*)";

}

group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram2)

{

select "(.zdata.zdata_cpu2|.zdata.zdata_cpu2.*)";

select "(.zbss.zbss_cpu2|.zbss.zbss_cpu2.*)";

}

group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram1)

{

select "(.zdata.zdata_cpu1|.zdata.zdata_cpu1.*)";

select "(.zbss.zbss_cpu1|.zbss.zbss_cpu1.*)";

}

group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram0)

{

select "(.zdata.zdata_cpu0|.zdata.zdata_cpu0.*)";

select "(.zbss.zbss_cpu0|.zbss.zbss_cpu0.*)";

}

group (ordered, attributes=rw, run_addr = mem:cpu0_dlmu)

{

select "(.zdata.zlmudata|.zdata.zlmudata.*)";

select "(.zbss.zlmubss|.zbss.zlmubss.*)";

}

/*Near Absolute Data, selectable by toolchain*/

# if LCF_DEFAULT_HOST == LCF_CPU5

group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram5)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU4

group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram4)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU3

group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram3)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU2

group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram2)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU1

group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram1)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU0

group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram0)

# endif

{

group zdata_mcal(attributes=rw)

{

select ".zdata.dsprInit.cpu0.32bit";

select ".zdata.dsprInit.cpu0.16bit";

select ".zdata.dsprInit.cpu0.8bit";

}

group zdata_powerOn(attributes=rw)

{

select ".zdata.dsprPowerOnInit.cpu0.32bit";

select ".zdata.dsprPowerOnInit.cpu0.16bit";

select ".zdata.dsprPowerOnInit.cpu0.8bit";

}

group zbss_mcal(attributes=rw)

{

select ".zbss.dsprClearOnInit.cpu0.32bit";

select ".zbss.dsprClearOnInit.cpu0.16bit";

select ".zbss.dsprClearOnInit.cpu0.8bit";

}

group zbss_noClear(attributes=rw)

{

select ".zbss.dsprNoInit.cpu0.32bit";

select ".zbss.dsprNoInit.cpu0.16bit";

select ".zbss.dsprNoInit.cpu0.8bit";

}

group zbss_powerOn(attributes=rw)

{

select ".zbss.dsprPowerOnClear.cpu0.32bit";

select ".zbss.dsprPowerOnClear.cpu0.16bit";

select ".zbss.dsprPowerOnClear.cpu0.8bit";

}

group zdata(attributes=rw)

{

select "(.zdata|.zdata.*)";

select "(.zbss|.zbss.*)";

}

/*Near Absolute Const, selectable with patterns and user defined sections*/

group

{

group (ordered, align = 4, contiguous, run_addr=mem:pfls0)

{

select ".zrodata.Ifx_Ssw_Tc0.*";

select ".zrodata.Ifx_Ssw_Tc1.*";

select ".zrodata.Ifx_Ssw_Tc2.*";

select ".zrodata.Ifx_Ssw_Tc3.*";

select ".zrodata.Ifx_Ssw_Tc4.*";

select ".zrodata.Ifx_Ssw_Tc5.*";

select ".zrodata.Cpu0_Main.*";

select ".zrodata.Cpu1_Main.*";

select ".zrodata.Cpu2_Main.*";

select ".zrodata.Cpu3_Main.*";

select ".zrodata.Cpu4_Main.*";

select ".zrodata.Cpu5_Main.*";

/*Near Absolute Const, selectable by toolchain*/

select ".zrodata.const.cpu0.32bit";

select ".zrodata.const.cpu0.16bit";

select ".zrodata.const.cpu0.8bit";

select ".zrodata.config.cpu0.32bit";

select ".zrodata.config.cpu0.16bit";

select ".zrodata.config.cpu0.8bit";

select "(.zrodata|.zrodata.*)";

}

/*Relative A0/A1/A8/A9 Addressable Sections*/

section_layout :vtc:linear

{

/*Relative A0 Addressable Data, selectable by toolchain*/

# if LCF_DEFAULT_HOST == LCF_CPU5

group a0 (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram5)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU4

group a0 (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram4)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU3

group a0 (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram3)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU2

group a0 (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram2)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU1

group a0 (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram1)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU0

group a0 (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram0)

# endif

{

select "(.data_a0.sdata|.data_a0.sdata.*)";

select "(.bss_a0.sbss|.bss_a0.sbss.*)";

}

"_SMALL_DATA_" := sizeof(group:a0) > 0 ? addressof(group:a0) : addressof(group:a0) & 0xF0000000 + 32k;

"__A0_MEM" = "_SMALL_DATA_";

/*Relative A1 Addressable Const, selectable by toolchain*/

/*Small constant sections, No option given for CPU specific user sections to make generated code portable across Cpus*/

# if LCF_DEFAULT_HOST == LCF_CPU5

group a1 (ordered, align = 4, run_addr=mem:pfls5)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU4

group a1 (ordered, align = 4, run_addr=mem:pfls4)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU3

group a1 (ordered, align = 4, run_addr=mem:pfls3)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU2

group a1 (ordered, align = 4, run_addr=mem:pfls2)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU1

group a1 (ordered, align = 4, run_addr=mem:pfls1)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU0

group a1 (ordered, align = 4, run_addr=mem:pfls0)

# endif

{

select "(.rodata_a1.srodata|.rodata_a1.srodata.*)";

select "(.ldata|.ldata.*)";

}

"_LITERAL_DATA_" := sizeof(group:a1) > 0 ? addressof(group:a1) : addressof(group:a1) & 0xF0000000 + 32k;

"__A1_MEM" = "_LITERAL_DATA_";

/*Relative A9 Addressable Data, selectable with patterns and user defined sections*/

group a9 (ordered, align = 4, run_addr=mem:lmuram)

{

select "(.data_a9.a9sdata|.data_a9.a9sdata.*)";

select "(.bss_a9.a9sbss|.bss_a9.a9sbss.*)";

}

"_A9_DATA_" := sizeof(group:a9) > 0 ? addressof(group:a9) : addressof(group:a9) & 0xF0000000 + 32k;

"__A9_MEM" = "_A9_DATA_";

/*Relative A8 Addressable Const, selectable with patterns and user defined sections*/

# if LCF_DEFAULT_HOST == LCF_CPU5

group a8 (ordered, align = 4, run_addr=mem:pfls5)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU4

group a8 (ordered, align = 4, run_addr=mem:pfls4)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU3

group a8 (ordered, align = 4, run_addr=mem:pfls3)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU2

group a8 (ordered, align = 4, run_addr=mem:pfls2)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU1

group a8 (ordered, align = 4, run_addr=mem:pfls1)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU0

group a8 (ordered, align = 4, run_addr=mem:pfls0)

# endif

{

select "(.rodata_a8.a8srodata|.rodata_a8.a8srodata.*)";

}

"_A8_DATA_" := sizeof(group:a8) > 0 ? addressof(group:a8) : addressof(group:a8) & 0xF0000000 + 32k;

"__A8_MEM" = "_A8_DATA_";

}

/*举个例子，

在core0的main函数里面调用一个函数

这个函数的c 文件需要dsram4内存里面运行

c文件名称： testmap.c

函数名称：void testmm(void)

只需要在下面groip对应的dsram4 里面把 c 的部分名字select一下，这里的* 意思是任意通配符

group (ordered, attributes=rw, run_addr=mem:dsram4)

{

select ".data.Ifx_Ssw_Tc4.*";

select ".data.Cpu4_Main.*";

select "(.data.data_cpu4|.data.data_cpu3.*)";

select ".bss.Ifx_Ssw_Tc4.*";

select ".bss.Cpu4_Main.*";

select "(.bss.bss_cpu4|.bss.bss_cpu4.*)";

select "(*testmap.*)"; // 这里高亮

}

group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram4)

{

select "(.zdata.zdata_cpu4|.zdata.zdata_cpu4.*)";

select "(.zbss.zbss_cpu4|.zbss.zbss_cpu4.*)";

select "(*testmap.*)";

}

编译出来的结果为：

| mpe:dsram4 | | .text.testmap.testmm (25427) | 0x0000000e | 0x30000000 | 0x0 | 0x00000002 |

| mpe:dsram4 | | .bss.testmap.testmmdata (25428) | 0x00000001 | 0x3000000e | 0x0000000e | 0x00000001 |

/*Far Data / Far Const Sections, selectable with patterns and user defined sections*/

section_layout :vtc:linear

{

/*Far Data Sections, selectable with patterns and user defined sections*/

group

{

/*DSRAM sections*/

group

{

group (ordered, attributes=rw, run_addr=mem:dsram5)

{

select ".data.Ifx_Ssw_Tc5.*";

select ".data.Cpu5_Main.*";

select "(.data.data_cpu5|.data.data_cpu5.*)";

select ".bss.Ifx_Ssw_Tc5.*";

select ".bss.Cpu5_Main.*";

select "(.bss.bss_cpu5|.bss.bss_cpu5.*)";

}

group (ordered, attributes=rw, run_addr=mem:dsram4)

{

select ".data.Ifx_Ssw_Tc4.*";

select ".data.Cpu4_Main.*";

select "(.data.data_cpu4|.data.data_cpu3.*)";

select ".bss.Ifx_Ssw_Tc4.*";

select ".bss.Cpu4_Main.*";

select "(.bss.bss_cpu4|.bss.bss_cpu4.*)";

}

group (ordered, attributes=rw, run_addr=mem:dsram3)

{

select ".data.Ifx_Ssw_Tc3.*";

select ".data.Cpu3_Main.*";

select "(.data.data_cpu3|.data.data_cpu3.*)";

select ".bss.Ifx_Ssw_Tc3.*";

select ".bss.Cpu3_Main.*";

select "(.bss.bss_cpu3|.bss.bss_cpu3.*)";

}

group (ordered, attributes=rw, run_addr=mem:dsram2)

{

select ".data.Ifx_Ssw_Tc2.*";

select ".data.Cpu2_Main.*";

select "(.data.data_cpu2|.data.data_cpu2.*)";

select ".bss.Ifx_Ssw_Tc2.*";

select ".bss.Cpu2_Main.*";

select "(.bss.bss_cpu2|.bss.bss_cpu2.*)";

}

group (ordered, attributes=rw, run_addr=mem:dsram1)

{

select ".data.Ifx_Ssw_Tc1.*";

select ".data.Cpu1_Main.*";

select "(.data.data_cpu1|.data.data_cpu1.*)";

select ".bss.Ifx_Ssw_Tc1.*";

select ".bss.Cpu1_Main.*";

select "(.bss.bss_cpu1|.bss.bss_cpu1.*)";

}

group (ordered, attributes=rw, run_addr=mem:dsram0)

{

select ".data.Ifx_Ssw_Tc0.*";

select ".data.Cpu0_Main.*";

select "(.data.data_cpu0|.data.data_cpu0.*)";

select ".bss.Ifx_Ssw_Tc0.*";

select ".bss.Cpu0_Main.*";

select "(.bss.bss_cpu0|.bss.bss_cpu0.*)";

}

/*LMU Data sections*/

group

{

group (ordered, attributes=rw, run_addr = mem:cpu0_dlmu)

{

select "(.data.lmudata_cpu0|.data.lmudata_cpu0.*)";

select "(.bss.lmubss_cpu0|.bss.lmubss_cpu0.*)";

}

group (ordered, attributes=rw, run_addr = mem:cpu1_dlmu)

{

select "(.data.lmudata_cpu1|.data.lmudata_cpu1.*)";

select "(.bss.lmubss_cpu1|.bss.lmubss_cpu1.*)";

}

group (ordered, attributes=rw, run_addr = mem:cpu2_dlmu)

{

select "(.data.lmudata_cpu2|.data.lmudata_cpu2.*)";

select "(.bss.lmubss_cpu2|.bss.lmubss_cpu2.*)";

}

group (ordered, attributes=rw, run_addr = mem:cpu3_dlmu)

{

select "(.data.lmudata_cpu3|.data.lmudata_cpu3.*)";

select "(.bss.lmubss_cpu3|.bss.lmubss_cpu3.*)";

}

group (ordered, attributes=rw, run_addr = mem:cpu4_dlmu)

{

select "(.data.lmudata_cpu4|.data.lmudata_cpu4.*)";

select "(.bss.lmubss_cpu4|.bss.lmubss_cpu4.*)";

}

group (ordered, attributes=rw, run_addr = mem:cpu5_dlmu)

{

select "(.data.lmudata_cpu5|.data.lmudata_cpu5.*)";

select "(.bss.lmubss_cpu5|.bss.lmubss_cpu5.*)";

}

group (ordered, attributes=rw, run_addr=mem:lmuram)

{

select "(.data.lmudata|.data.lmudata.*)";

select "(.bss.lmubss|.bss.lmubss.*)";

}

/*Far Data Sections, selectable by toolchain*/

# if LCF_DEFAULT_HOST == LCF_CPU5

group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram5)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU4

group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram4)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU3

group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram3)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU2

group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram2)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU1

group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram1)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU0

group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram0)

# endif

{

group data_mcal(attributes=rw)

{

select ".data.farDsprInit.cpu0.32bit";

select ".data.farDsprInit.cpu0.16bit";

select ".data.farDsprInit.cpu0.8bit";

}

group bss_mcal(attributes=rw)

{

select ".bss.farDsprClearOnInit.cpu0.32bit";

select ".bss.farDsprClearOnInit.cpu0.16bit";

select ".bss.farDsprClearOnInit.cpu0.8bit";

}

group bss_noInit(attributes=rw)

{

select ".bss.farDsprNoInit.cpu0.32bit";

select ".bss.farDsprNoInit.cpu0.16bit";

select ".bss.farDsprNoInit.cpu0.8bit";

}

group data(attributes=rw)

{

select "(.data|.data.*)";

select "(.bss|.bss.*)";

}

/*Heap allocation*/

# if LCF_DEFAULT_HOST == LCF_CPU5

group (ordered, align = 4, run_addr = mem:dsram5[LCF_HEAP5_OFFSET])

# endif

# if LCF_DEFAULT_HOST == LCF_CPU4

group (ordered, align = 4, run_addr = mem:dsram4[LCF_HEAP4_OFFSET])

# endif

# if LCF_DEFAULT_HOST == LCF_CPU3

group (ordered, align = 4, run_addr = mem:dsram3[LCF_HEAP3_OFFSET])

# endif

# if LCF_DEFAULT_HOST == LCF_CPU2

group (ordered, align = 4, run_addr = mem:dsram2[LCF_HEAP2_OFFSET])

# endif

# if LCF_DEFAULT_HOST == LCF_CPU1

group (ordered, align = 4, run_addr = mem:dsram1[LCF_HEAP1_OFFSET])

# endif

# if LCF_DEFAULT_HOST == LCF_CPU0

group (ordered, align = 4, run_addr = mem:dsram0[LCF_HEAP0_OFFSET])

# endif

{

heap "heap" (size = LCF_HEAP_SIZE);

}

/*Far Const Sections, selectable with patterns and user defined sections*/

group

{

group (ordered, align = 4, run_addr=mem:pfls0)

{

select ".rodata.Ifx_Ssw_Tc0.*";

select ".rodata.Cpu0_Main.*";

select "(.rodata.rodata_cpu0|.rodata.rodata_cpu0.*)";

}

group (ordered, align = 4, run_addr=mem:pfls1)

{

select ".rodata.Cpu1_Main.*";

select ".rodata.Ifx_Ssw_Tc1.*";

select "(.rodata.rodata_cpu1|.rodata.rodata_cpu1.*)";

}

group (ordered, align = 4, run_addr=mem:pfls2)

{

select ".rodata.Ifx_Ssw_Tc2.*";

select ".rodata.Cpu2_Main.*";

select "(.rodata.rodata_cpu2|.rodata.rodata_cpu2.*)";

}

group (ordered, align = 4, run_addr=mem:pfls3)

{

select ".rodata.Ifx_Ssw_Tc3.*";

select ".rodata.Cpu3_Main.*";

select "(.rodata.rodata_cpu3|.rodata.rodata_cpu3.*)";

}

group (ordered, align = 4, run_addr=mem:pfls4)

{

select ".rodata.Ifx_Ssw_Tc4.*";

select ".rodata.Cpu4_Main.*";

select "(.rodata.rodata_cpu4|.rodata.rodata_cpu4.*)";

}

group (ordered, align = 4, run_addr=mem:pfls5)

{

select ".rodata.Ifx_Ssw_Tc5.*";

select ".rodata.Cpu5_Main.*";

select "(.rodata.rodata_cpu5|.rodata.rodata_cpu5.*)";

}

/*Far Const Sections, selectable by toolchain*/

# if LCF_DEFAULT_HOST == LCF_CPU5

group (ordered, align = 4, run_addr=mem:pfls5)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU4

group ordered, align = 4, run_addr=mem:pfls4)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU3

group (ordered, align = 4, run_addr=mem:pfls3)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU2

group (ordered, align = 4, run_addr=mem:pfls2)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU1

group (ordered, align = 4, run_addr=mem:pfls1)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU0

group (ordered, align = 4, run_addr=mem:pfls0)

# endif

{

select ".rodata.farConst.cpu0.32bit";

select ".rodata.farConst.cpu0.16bit";

select ".rodata.farConst.cpu0.8bit";

select "(.rodata|.rodata.*)";

}

/* PSRAM Code selections*/

section_layout :vtc:linear

{

/*Code Sections, selectable with patterns and user defined sections*/

group

{

/*Program Scratchpad Sections*/

group

{

group code_psram0 (ordered, attributes=rwx, copy, run_addr=mem:psram0)

{

select "(.text.cpu0_psram|.text.cpu0_psram.*)";

select "(.text.psram_text_cpu0|.text.psram_text_cpu0.*)";

}

group code_psram1 (ordered, attributes=rwx, copy, run_addr=mem:psram1)

{

select "(.text.cpu1_psram|.text.cpu1_psram.*)";

select "(.text.psram_text_cpu1|.text.psram_text_cpu1.*)";

}

group code_psram2 (ordered, attributes=rwx, copy, run_addr=mem:psram2)

{

select "(.text.cpu2_psram|.text.cpu2_psram.*)";

select "(.text.psram_text_cpu2|.text.psram_text_cpu2.*)";

}

group code_psram3 (ordered, attributes=rwx, copy, run_addr=mem:psram3)

{

select "(.text.cpu3_psram|.text.cpu3_psram.*)";

select "(.text.psram_text_cpu3|.text.psram_text_cpu3.*)";

}

group code_psram4 (ordered, attributes=rwx, copy, run_addr=mem:psram4)

{

select "(.text.cpu4_psram|.text.cpu4_psram.*)";

select "(.text.psram_text_cpu4|.text.psram_text_cpu4.*)";

}

group code_psram5 (ordered, attributes=rwx, copy, run_addr=mem:psram5)

{

select "(.text.cpu5_psram|.text.cpu5_psram.*)";

select "(.text.psram_text_cpu5|.text.psram_text_cpu5.*)";

}

/* FLS Code selections*/

section_layout :vtc:linear

{

/*Code Sections, selectable with patterns and user defined sections*/

group

{

/*Cpu specific PFLASH Sections*/

group

{

group (ordered, align = 4, run_addr=mem:pfls0)

{

select ".text.Ifx_Ssw_Tc0.*";

select ".text.Cpu0_Main.*";

select ".text.CompilerTasking.Ifx_C_Init";

select "(.text.text_cpu0|.text.text_cpu0.*)";

}

group (ordered, align = 4, run_addr=mem:pfls1)

{

select ".text.Ifx_Ssw_Tc1.*";

select ".text.Cpu1_Main.*";

select "(.text.text_cpu1|.text.text_cpu1.*)";

}

group (ordered, align = 4, run_addr=mem:pfls2)

{

select ".text.Ifx_Ssw_Tc2.*";

select ".text.Cpu2_Main.*";

select "(.text.text_cpu2|.text.text_cpu2.*)";

}

group (ordered, align = 4, run_addr=mem:pfls3)

{

select ".text.Ifx_Ssw_Tc3.*";

select ".text.Cpu3_Main.*";

select "(.text.text_cpu3|.text.text_cpu3.*)";

}

group (ordered, align = 4, run_addr=mem:pfls4)

{

select ".text.Ifx_Ssw_Tc4.*";

select ".text.Cpu4_Main.*";

select ".text.text_cpu4*";

select "(.text.text_cpu4|.text.text_cpu4.*)";

}

group (ordered, align = 4, run_addr=mem:pfls5)

{

select ".text.Ifx_Ssw_Tc5.*";

select ".text.Cpu5_Main.*";

select ".text.text_cpu5*";

select "(.text.text_cpu5|.text.text_cpu5.*)";

}

/*Code Sections, selectable by toolchain*/

# if LCF_DEFAULT_HOST == LCF_CPU5

group (ordered, run_addr=mem:pfls5)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU4

group ordered, run_addr=mem:pfls4)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU3

group (ordered, run_addr=mem:pfls3)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU2

group (ordered, run_addr=mem:pfls2)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU1

group (ordered, run_addr=mem:pfls1)

# endif

# if LCF_DEFAULT_HOST == LCF_CPU0

group (ordered, run_addr=mem:pfls0)

# endif

{

select ".text.fast.pfls.cpu0";

select ".text.slow.pfls.cpu0";

select ".text.5ms.pfls.cpu0";

select ".text.10ms.pfls.cpu0";

select ".text.callout.pfls.cpu0";

select "(.text|.text.*)";

}

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