近期一直在调试ads1158，终于能够得到正常的输出，期间在网上查了很多的资料，发现关于ads1158的资料很少，尤其是基于verilog的程序几乎没有，所查的资料大多语焉不详，因此，本着人人为我，我为人人的精神，现在把ads1158的调试心得写出来，希望能够帮助一些开发者，节省开发时间。

1、在开发初期，由于是中途接手的项目，对硬件熟悉不够，导致耽误了不少时间，具体的硬件原因就不细说了，因为每一个开发者的硬件不可能是一样的，在这里给的建议是：在ads1158这部分的电路，可以根据数据手册来设计。另外，对于ads1158或者1258来说，模拟量是可以通过muxoutp(pin44)和muxoutn(pin43)引出来后自己添加一些信号处理的电路(如放大，滤波等)，再由管脚adcinp(pin42)和adcinn(pin41)输入进芯片进行a/d转换，当然也可以在内部直接连接。如果需要在外部进行信号处理的话，在程序设计的时候需要对config0寄存器bit4位置为1(默认值为0)。数据手册上给出了两种外部信号处理的电路，在数据手册的42和43页。

2、在程序设计的时候，数据手册上给出了一个流程(在数据手册的40页)。具体为：1)reset spi接口。这是非常重要的一步，这也是我调试花的时间最多地方。如果要使芯片能正常工作，首先要使spi能正常工作。在调试前，有必要仔细研究一下spi的时序(数据手册第7页，图1)。复位的步骤是先将cs置高一段时间再拉低,至于置高的时间我也没搞懂，如果按照数据手册上的4096个fclk的话，发现spi的输出线上的数据是乱的，然后我就不断地增加延长的时间，直至spi出现的数据与预想的差不多。sck的信号通过spi master端(可以是单片机、dsp、cpld/fpga等)给出，这里要注意sck的信号是需要的时候再给，而不是一直给的。比如在发送命令、读取寄存器值，或者读取数据的时候。当然，对另外一个管脚cs的控制也很重要，cs的控制也是在需要的时候再拉低，闲时置高。2)把start管脚置为0，停止转换。一般在初始化的时候基本上都是start=0的。3)软件复位芯片。有的是把reset脚通过硬件复位的，由于我们是软件复位的，不熟悉硬件复位的情况，所以对于硬件复位的话，这步可能不需要。4)配置寄存器。配置的值按照数据手册上的说明结合自己的实际需求给出。5)回读寄存器的值。这个步骤在调试的时候很有用，可以作为判断是否正常工作，如果读出来的值与写进去的值一样，说明spi能够正常工作，尤其是可以根据id寄存器的值来判断，因为这个值是固定的。当然，如果程序调试好了，这部分的程序是可以不要的。6)以上的步骤完成后，可以将start置为1，开始转换。7)开始读数据，读的方式按照数据手册上的三种(直接读，命令读，脉冲读)选一种即可，我选的是直接读，根据drdy的管脚来判断。基本上按照以上的流程来操作是没有问题的，不管是基于什么语言开发。在这里再次强调一下首先要保证spi能够正常通讯。

3、ads1258基本上和1158操作流程是一样的。网上关于1258的例程比1158的多。TI的这两款芯片用好了是高性能ad转换器，用不好能把人折腾死。数据手册一定要细读。我在调试期间在社区里发了两个帖子都烂尾，不知道是我问的问题太简单，还是工作人员太忙，最后也就不了了之。

4、以下是基于verilog编写的源代码。cpld的晶振是50M。分频后得到500K作为sck。

module adc(

clk,

rst_n,

cs,

sck,

start,

pwdn,

drdy,

miso,

mosi,

rst_ad,

dataout,

clkout

);

input clk,rst_n;

input miso; //from ad device

input drdy;

output reg start;

output reg rst_ad;

output reg pwdn;

output reg cs;

output sck;

output reg mosi ;//to ad device

reg[15:0] cnt;

output reg clkout;

always @(posedge clk or negedge rst_n)begin

if (!rst_n)begin

clkout <= 1'd0;

cnt<=16'd0;

end

else if (cnt == 16'd50)begin

clkout <=~clkout;

cnt <=16'd0;

end

elsebegin

cnt <=cnt+1'd1;

end

end

assign sck =clkout && flag_sck;//通过一个标志位与clkout与操作后得到sck

reg flag_sck;

reg [15:0]state_spi;

reg [31:0]time_delay1,time_delay2;

always @(negedge clkout or negedge rst_n) begin

if(!rst_n) begin

cs <=1'd1;

flag_sck <=1'd0;

rst_ad <=1'd0;

pwdn<=1'd1;

rst_ad<=1'd1;

state_spi<=16'd0;

time_delay1<=32'd0;

time_delay2<=32'd0;

end

else begin

case (state_spi)

16'd0: begin

cs<=1'd1;

flag_sck<=1'd0;

//start<=1'd0;

mosi<=1'd0;

state_spi<=state_spi+1'd1;

end

16'd1: begin

if(time_delay1==32'd3000)begin //3000这个值是最后试出来的,如果按照500K的sck来算，远大于数据手册上的4096fclk。

cs<=1'd0;

flag_sck<=1'd1;

time_delay1<=32'd0;

state_spi<=state_spi+1'd1;

end

else begin

cs<=1'd1;

time_delay1<=time_delay1+1'd1;

end

end

16'd2: begin

start<=1'd0;

state_spi<=state_spi+1'd1;

end

16'd3: begin

if(time_delay2==32'd3000)begin //复位芯片，这个值也是最后试出来的。

rst_ad<=1'd1;

time_delay2<=32'd0;

state_spi<=state_spi+1'd1;

end

else begin

rst_ad<=1'd0;

time_delay2<=time_delay2+1'd1;

end

end

16'd4: begin cs <=1'd1;flag_sck<=1'd0; state_spi<=state_spi+1'd1;end

16'd5: state_spi<=state_spi+1'd1;

16'd6: state_spi<=state_spi+1'd1;

16'd7: state_spi<=state_spi+1'd1;

16'd8: state_spi<=state_spi+1'd1;

16'd9: state_spi<=state_spi+1'd1;

16'd10: state_spi<=state_spi+1'd1;

16'd11: state_spi<=state_spi+1'd1;

16'd12: state_spi<=state_spi+1'd1;

16'd13: state_spi<=state_spi+1'd1;

16'd14: state_spi<=state_spi+1'd1;

16'd15: state_spi<=state_spi+1'd1;

16'd16: state_spi<=state_spi+1'd1;

16'd17: state_spi<=state_spi+1'd1;

16'd18: state_spi<=state_spi+1'd1;

16'd19: state_spi<=state_spi+1'd1;

16'd20: state_spi<=state_spi+1'd1;

16'd21: state_spi<=state_spi+1'd1;

16'd22: state_spi<=state_spi+1'd1;

16'd23: state_spi<=state_spi+1'd1;

16'd24: state_spi<=state_spi+1'd1;

16'd25: state_spi<=state_spi+1'd1;

16'd26: state_spi<=state_spi+1'd1;

16'd27: state_spi<=state_spi+1'd1;

16'd28: state_spi<=state_spi+1'd1;

16'd29: state_spi<=state_spi+1'd1;

16'd30: begin state_spi<=state_spi+1'd1; end

16'd31: begin

cs<=1'd0;

//flag_sck<=1'd1;

state_spi<=state_spi+1'd1;

end

//write register command

16'd32: begin

flag_sck<=1'd1;

mosi<=1'd0;

state_spi<=state_spi+1'd1;

end

16'd33: begin

//flag_sck<=1'd1;

mosi<=1'd1;

state_spi<=state_spi+1'd1;

end

16'd34: begin

mosi<=1'd1;

state_spi<=state_spi+1'd1;

end

16'd35: begin

mosi<=1'd1;

state_spi<=state_spi+1'd1;

end

16'd36: begin

mosi<=1'd0;

state_spi<=state_spi+1'd1;

end

16'd37: begin

mosi<=1'd0;

state_spi<=state_spi+1'd1;

end

16'd38: begin

mosi<=1'd0;

state_spi<=state_spi+1'd1;

end

16'd39: begin

mosi<=1'd0;

state_spi<=state_spi+1'd1;

end

//config0

16'd40: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd41: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd42: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd43: begin

mosi <=1'd1;

state_spi<=state_spi+1'd1;

end

16'd44: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd45: begin

mosi <=1'd1;

state_spi<=state_spi+1'd1;

end

16'd46: begin

mosi <=1'd1;

state_spi<=state_spi+1'd1;

end

16'd47: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

//config1

16'd48: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd49: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd50: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd51: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd52: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd53: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd54: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd55: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

//muxsch

16'd56: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd57: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd58: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd59: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd60: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd61: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd62: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd63: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

//muxdif

16'd64: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd65: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd66: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd67: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd68: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd69: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd70: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd71: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

//muxsg0

16'd72: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd73: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd74: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end//

16'd75: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd76: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd77: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd78: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd79: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

//muxsg1

16'd80: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd81: begin

mosi <=1'd1;

state_spi<=state_spi+1'd1;

end

16'd82: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end//

16'd83: begin //ch12

mosi <=1'd1;

state_spi<=state_spi+1'd1;

end

16'd84: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd85: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd86: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd87: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

//sysred

16'd88: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd89: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd90: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd91: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd92: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd93: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd94: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd95: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

//gpioc

16'd96: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd97: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd98: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end//

16'd99: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd100: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd101: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd102: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd103: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

//gpiod

16'd104: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd105: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd106: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end//

16'd107: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd108: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd109: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd110: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd111: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

//id

16'd112: begin

mosi <=1'd1;

state_spi<=state_spi+1'd1;

end

16'd113: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd114: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd115: begin

mosi <=1'd1;

state_spi<=state_spi+1'd1;

end

16'd116: begin

mosi <=1'd1;

state_spi<=state_spi+1'd1;

end

16'd117: begin

mosi <=1'd0;

state_spi<=state_spi+1'd1;

end

16'd118: begin

mosi <=1'd1;

state_spi<=state_spi+1'd1;

end

16'd119: begin

mosi <=1'd1;

state_spi<=state_spi+1'd1;

end

16'd120: begin

cs<=1'd1;

flag_sck<=1'd0;

mosi<=1'd0;

//start<=1'd1;

state_spi<=state_spi+1'd1;

end

16'd121:state_spi<=state_spi+1'd1;

16'd122:state_spi<=state_spi+1'd1;

16'd123:state_spi<=state_spi+1'd1;

16'd124:state_spi<=state_spi+1'd1;

16'd125:state_spi<=state_spi+1'd1;

16'd126:state_spi<=state_spi+1'd1;

16'd127:state_spi<=state_spi+1'd1;

16'd128:begin state_spi<=state_spi+1'd1;end

16'd129: begin cs<=1'd0;state_spi<=state_spi+1'd1;end

16'd130: begin flag_sck<=1'd1;mosi<=1'd0;state_spi<=state_spi+1'd1;end

16'd131: begin mosi<=1'd1; state_spi<=state_spi+1'd1;end

16'd132: begin mosi<=1'd0; state_spi<=state_spi+1'd1;end

16'd133: begin mosi<=1'd1; state_spi<=state_spi+1'd1;end

16'd134: begin mosi<=1'd0; state_spi<=state_spi+1'd1;end

16'd135: begin mosi<=1'd0; state_spi<=state_spi+1'd1;end

16'd136: begin mosi<=1'd0; state_spi<=state_spi+1'd1;end

16'd137: begin mosi<=1'd0; state_spi<=state_spi+1'd1;end

16'd138: begin state_spi<=state_spi+1'd1;end

16'd139:begin state_spi<=state_spi+1'd1;end

16'd140:state_spi<=state_spi+1'd1;

16'd141:state_spi<=state_spi+1'd1;

16'd142:state_spi<=state_spi+1'd1;

16'd143:state_spi<=state_spi+1'd1;

16'd144:state_spi<=state_spi+1'd1;

16'd145:state_spi<=state_spi+1'd1;

16'd146:state_spi<=state_spi+1'd1;

16'd147:state_spi<=state_spi+1'd1;

16'd148:state_spi<=state_spi+1'd1;

16'd149:state_spi<=state_spi+1'd1;

16'd150:state_spi<=state_spi+1'd1;

16'd151:state_spi<=state_spi+1'd1;

16'd152:state_spi<=state_spi+1'd1;

16'd153:state_spi<=state_spi+1'd1;//16

16'd154: begin state_spi<=state_spi+1'd1;end

16'd155:state_spi<=state_spi+1'd1;

16'd156:state_spi<=state_spi+1'd1;

16'd157:state_spi<=state_spi+1'd1;

16'd158:state_spi<=state_spi+1'd1;

16'd159:state_spi<=state_spi+1'd1;

16'd160:state_spi<=state_spi+1'd1;

16'd161:state_spi<=state_spi+1'd1;

16'd162:state_spi<=state_spi+1'd1;

16'd163:state_spi<=state_spi+1'd1;

16'd164:state_spi<=state_spi+1'd1;

16'd165:state_spi<=state_spi+1'd1;

16'd166:state_spi<=state_spi+1'd1;

16'd167:state_spi<=state_spi+1'd1;

16'd168:state_spi<=state_spi+1'd1;

16'd169:state_spi<=state_spi+1'd1;

16'd170: begin state_spi<=state_spi+1'd1;end

16'd171:state_spi<=state_spi+1'd1;

16'd172:state_spi<=state_spi+1'd1;

16'd173:state_spi<=state_spi+1'd1;

16'd174:state_spi<=state_spi+1'd1;

16'd175:state_spi<=state_spi+1'd1;

16'd176:state_spi<=state_spi+1'd1;

16'd177:state_spi<=state_spi+1'd1;//40

16'd178:state_spi<=state_spi+1'd1;

16'd179:state_spi<=state_spi+1'd1;

16'd180:state_spi<=state_spi+1'd1;

16'd181:state_spi<=state_spi+1'd1;

16'd182:state_spi<=state_spi+1'd1;

16'd183:state_spi<=state_spi+1'd1;

16'd184:state_spi<=state_spi+1'd1;

16'd185:state_spi<=state_spi+1'd1;

16'd186: begin state_spi<=state_spi+1'd1;end

16'd187:state_spi<=state_spi+1'd1;

16'd188:state_spi<=state_spi+1'd1;

16'd189:state_spi<=state_spi+1'd1;

16'd190:state_spi<=state_spi+1'd1;

16'd191:state_spi<=state_spi+1'd1;

16'd192:state_spi<=state_spi+1'd1;

16'd193:state_spi<=state_spi+1'd1;

16'd194:state_spi<=state_spi+1'd1;

16'd195:state_spi<=state_spi+1'd1;

16'd196:state_spi<=state_spi+1'd1;

16'd197:state_spi<=state_spi+1'd1;

16'd198:state_spi<=state_spi+1'd1;

16'd199:state_spi<=state_spi+1'd1;

16'd200:state_spi<=state_spi+1'd1;

16'd201:state_spi<=state_spi+1'd1;

16'd202: begin state_spi<=state_spi+1'd1;end

16'd203:state_spi<=state_spi+1'd1;//66

16'd204:state_spi<=state_spi+1'd1;

16'd205:state_spi<=state_spi+1'd1;

16'd206:state_spi<=state_spi+1'd1;

16'd207:state_spi<=state_spi+1'd1;

16'd208:state_spi<=state_spi+1'd1;

16'd209:state_spi<=state_spi+1'd1;

16'd210:state_spi<=state_spi+1'd1;

16'd211:state_spi<=state_spi+1'd1;

16'd212:state_spi<=state_spi+1'd1;

16'd213:state_spi<=state_spi+1'd1;

16'd214:state_spi<=state_spi+1'd1;

16'd215:state_spi<=state_spi+1'd1;

16'd216:state_spi<=state_spi+1'd1;

16'd217:state_spi<=state_spi+1'd1;//88

16'd218:state_spi<=state_spi+1'd1;

16'd219:state_spi<=state_spi+1'd1;

16'd220:state_spi<=state_spi+1'd1;

16'd221:state_spi<=state_spi+1'd1;

16'd222:state_spi<=state_spi+1'd1;

16'd223:state_spi<=state_spi+1'd1;

16'd224:state_spi<=state_spi+1'd1;

16'd225:state_spi<=state_spi+1'd1;

16'd226:state_spi<=state_spi+1'd1;

16'd227: begin

cs<=1'd1;

flag_sck<=1'd0;

start<=1'd1;

state_spi<=state_spi+1'd1;//state_spi<=16'd228;

end

16'd228:state_spi<=state_spi+1'd1;

16'd229:state_spi<=state_spi+1'd1;

16'd230:state_spi<=state_spi+1'd1;

16'd231:state_spi<=state_spi+1'd1;

16'd232:state_spi<=state_spi+1'd1;

16'd233:state_spi<=state_spi+1'd1;

16'd234:state_spi<=state_spi+1'd1;

//16'd235:begin state_spi<=state_spi+1'd1;end

16'd235: begin

if(drdy==1'd0)begin

//cs<=1'd0;

state_spi<=state_spi+1'd1;

end

end

16'd236:begin cs<=1'd0;state_spi<=state_spi+1'd1;end

16'd237: begin flag_sck<=1'd1; mosi<=1'd0; state_spi<=state_spi+1'd1;end

16'd238: begin mosi<=1'd0; state_spi<=state_spi+1'd1;end

16'd239: begin mosi<=1'd0; state_spi<=state_spi+1'd1;end

16'd240: begin mosi<=1'd0; state_spi<=state_spi+1'd1;end

16'd241: begin mosi<=1'd0; state_spi<=state_spi+1'd1;end

16'd242: begin mosi<=1'd0; state_spi<=state_spi+1'd1;end

16'd243: begin mosi<=1'd0; state_spi<=state_spi+1'd1;end

16'd244: begin mosi<=1'd0; state_spi<=state_spi+1'd1;end

16'd245: begin state_spi<=state_spi+1'd1;end

16'd246:state_spi<=state_spi+1'd1;

16'd247:state_spi<=state_spi+1'd1;

16'd248:state_spi<=state_spi+1'd1;

16'd249:state_spi<=state_spi+1'd1;

16'd250:state_spi<=state_spi+1'd1;

16'd251:state_spi<=state_spi+1'd1;

16'd252:state_spi<=state_spi+1'd1;

16'd253:state_spi<=state_spi+1'd1;

16'd254:state_spi<=state_spi+1'd1;

16'd255:state_spi<=state_spi+1'd1;

16'd256:state_spi<=state_spi+1'd1;

16'd257:state_spi<=state_spi+1'd1;

16'd258:state_spi<=state_spi+1'd1;

16'd259:state_spi<=state_spi+1'd1;

16'd260:state_spi<=state_spi+1'd1;

/*16'd261:state_spi<=state_spi+1'd1;

16'd262:state_spi<=state_spi+1'd1;

16'd263:state_spi<=state_spi+1'd1;

16'd264:state_spi<=state_spi+1'd1;

16'd265:state_spi<=state_spi+1'd1;

16'd266:state_spi<=state_spi+1'd1;

16'd267:state_spi<=state_spi+1'd1;

16'd268:state_spi<=state_spi+1'd1;

/*16'd154:state_spi<=state_spi+1'd1;

16'd155:state_spi<=state_spi+1'd1;

16'd156:state_spi<=state_spi+1'd1;

16'd157:state_spi<=state_spi+1'd1;

16'd158:state_spi<=state_spi+1'd1;

16'd159:state_spi<=state_spi+1'd1;

16'd160:state_spi<=state_spi+1'd1;

16'd161:state_spi<=state_spi+1'd1;*/

16'd261: begin

cs<=1'd1;

flag_sck<=1'd0;

flag_rdat<=1'd0;

state_spi<=16'd228;

end

default:state_spi<=16'd0;

endcase

end

end

endmodule