segger公司调试cortex-m内核出现hardfault的方法
2024-04-13 00:26:00
HardFaultHandler.S文件的内容
/*********************************************************************
* SEGGER Microcontroller GmbH & Co. KG *
* The Embedded Experts *
**********************************************************************
* *
* (c) 1995 - 2017 SEGGER Microcontroller GmbH & Co. KG *
* *
* Internet: segger.com Support: support_embos@segger.com *
* *
**********************************************************************
* *
* embOS * Real time operating system for microcontrollers *
* *
* Please note: *
* *
* Knowledge of this file may under no circumstances *
* be used to write a similar product or a real-time *
* operating system for in-house use. *
* *
* Thank you for your fairness ! *
* *
**********************************************************************
* *
* OS version: 4.32 *
* *
**********************************************************************
;
;----------------------------------------------------------------------
;File : HardFaultHandler.S
;Purpose : HardFault exception handler for IAR, Keil and GNU assembler.
; Evaluates used stack (MSP, PSP) and passes appropiate stack
; pointer to the HardFaultHandler "C"-routine.
;------------- END-OF-HEADER ------------------------------------------
;*/#ifndef __IAR_SYSTEMS_ASM__#ifndef __CC_ARM#ifndef __GNUC__#error "Unsupported assembler!"#endif#endif
#endif;/*********************************************************************
;*
;* Forward declarations of segments used
;*
;**********************************************************************
;*/#ifdef __IAR_SYSTEMS_ASM__SECTION CODE:CODE:NOROOT(2)SECTION CSTACK:DATA:NOROOT(3)#elif defined __CC_ARMAREA OSKERNEL, CODE, READONLY, ALIGN=2PRESERVE8#endif;/*********************************************************************
;*
;* Publics
;*
;**********************************************************************
;*/#ifdef __IAR_SYSTEMS_ASM__SECTION .text:CODE:NOROOT(2)PUBLIC HardFault_Handler#elif defined __CC_ARMEXPORT HardFault_Handler#elif defined __GNUC__.global HardFault_Handler.type HardFault_Handler, function#endif;/*********************************************************************
;*
;* Externals, code
;*
;**********************************************************************
;*/#ifdef __IAR_SYSTEMS_ASM__EXTERN HardFaultHandler#elif defined __CC_ARMIMPORT HardFaultHandler#elif defined __GNUC__.extern HardFaultHandler#endif;/*********************************************************************
;*
;* CODE segment
;*
;**********************************************************************
;*/#ifdef __GNUC__.syntax unified.thumb.balign 4.text#elseTHUMB#endif;/*********************************************************************
;*
;* Global functions
;*
;**********************************************************************
;*/;/*********************************************************************
;*
;* HardFault_Handler()
;*
;* Function description
;* Evaluates the used stack (MSP, PSP) and passes the appropiate
;* stack pointer to the HardFaultHandler "C"-routine.
;*
;* Notes
;* (1) Ensure that HardFault_Handler is part of the exception table
;*/
#ifdef __GNUC__
HardFault_Handler:
#else
HardFault_Handler
#endif
#if (defined (__IAR_SYSTEMS_ASM__) && (__ARM6M__) && (__CORE__ == __ARM6M__)) || \(defined (__CC_ARM) && (__TARGET_ARCH_6S_M)) || \(defined (__GNUC__) && (__ARM_ARCH_6M__));// This version is for Cortex M0movs R0, #4mov R1, LRtst R0, R1 ;// Check EXC_RETURN in Link register bit 2.bne Uses_PSPmrs R0, MSP ;// Stacking was using MSP.b Pass_StackPtr
#ifdef __GNUC__
Uses_PSP:
#else
Uses_PSP
#endifmrs R0, PSP ;// Stacking was using PSP.
#ifdef __GNUC__
Pass_StackPtr:
#else
Pass_StackPtr
#endif
#ifdef __CC_ARMALIGN
#endifldr R2,=HardFaultHandlerbx R2 ;// Stack pointer passed through R0.#else;// This version is for Cortex M3, Cortex M4 and Cortex M4Ftst LR, #4 ;// Check EXC_RETURN in Link register bit 2.ite EQmrseq R0, MSP ;// Stacking was using MSP.mrsne R0, PSP ;// Stacking was using PSP.b HardFaultHandler ;// Stack pointer passed through R0.
#endif#ifdef __GNUC__.end
#elseEND
#endif;/****** End Of File *************************************************/
SEGGER_HardFaultHandler.c文件的内容
/*********************************************************************
* SEGGER Microcontroller GmbH & Co. KG *
* The Embedded Experts *
**********************************************************************
* *
* (c) 1995 - 2017 SEGGER Microcontroller GmbH & Co. KG *
* *
* Internet: segger.com Support: support_embos@segger.com *
* *
**********************************************************************
* *
* embOS * Real time operating system for microcontrollers *
* *
* Please note: *
* *
* Knowledge of this file may under no circumstances *
* be used to write a similar product or a real-time *
* operating system for in-house use. *
* *
* Thank you for your fairness ! *
* *
**********************************************************************
* *
* OS version: 4.32 *
* *
**********************************************************************----------------------------------------------------------------------
File : SEGGER_HardFaultHandler.c
Purpose : Generic SEGGER HardFault handler for Cortex-M
Literature:[1] Analyzing HardFaults on Cortex-M CPUs (https://www.segger.com/downloads/appnotes/AN00016_AnalyzingHardFaultsOnCortexM.pdf)Additional information:This HardFault handler enables user-friendly analysis of hard faultsin debug configurations.If a release configuration requires a HardFault handler,a specific HardFault handler should be included instead,which for example issues a reset or lits an error LED.
-------- END-OF-HEADER ---------------------------------------------
*//*********************************************************************
*
* Defines
*
**********************************************************************
*/
#define SYSHND_CTRL (*(volatile unsigned int*) (0xE000ED24u)) // System Handler Control and State Register
#define NVIC_MFSR (*(volatile unsigned char*) (0xE000ED28u)) // Memory Management Fault Status Register
#define NVIC_BFSR (*(volatile unsigned char*) (0xE000ED29u)) // Bus Fault Status Register
#define NVIC_UFSR (*(volatile unsigned short*)(0xE000ED2Au)) // Usage Fault Status Register
#define NVIC_HFSR (*(volatile unsigned int*) (0xE000ED2Cu)) // Hard Fault Status Register
#define NVIC_DFSR (*(volatile unsigned int*) (0xE000ED30u)) // Debug Fault Status Register
#define NVIC_BFAR (*(volatile unsigned int*) (0xE000ED38u)) // Bus Fault Manage Address Register
#define NVIC_AFSR (*(volatile unsigned int*) (0xE000ED3Cu)) // Auxiliary Fault Status Register#ifndef DEBUG // Should be overwritten by project settings#define DEBUG (0) // in debug builds
#endif/*********************************************************************
*
* Prototypes
*
**********************************************************************
*/
#ifdef __cplusplusextern "C" {
#endif
void HardFaultHandler(unsigned int* pStack);
#ifdef __cplusplus}
#endif/*********************************************************************
*
* Static data
*
**********************************************************************
*/
#if DEBUG
static volatile unsigned int _Continue; // Set this variable to 1 to run furtherstatic struct {struct {volatile unsigned int r0; // Register R0volatile unsigned int r1; // Register R1volatile unsigned int r2; // Register R2volatile unsigned int r3; // Register R3volatile unsigned int r12; // Register R12volatile unsigned int lr; // Link registervolatile unsigned int pc; // Program counterunion {volatile unsigned int byte;struct {unsigned int IPSR : 8; // Interrupt Program Status register (IPSR)unsigned int EPSR : 19; // Execution Program Status register (EPSR)unsigned int APSR : 5; // Application Program Status register (APSR)} bits;} psr; // Program status register.} SavedRegs;union {volatile unsigned int byte;struct {unsigned int MEMFAULTACT : 1; // Read as 1 if memory management fault is activeunsigned int BUSFAULTACT : 1; // Read as 1 if bus fault exception is activeunsigned int UnusedBits1 : 1;unsigned int USGFAULTACT : 1; // Read as 1 if usage fault exception is activeunsigned int UnusedBits2 : 3;unsigned int SVCALLACT : 1; // Read as 1 if SVC exception is activeunsigned int MONITORACT : 1; // Read as 1 if debug monitor exception is activeunsigned int UnusedBits3 : 1;unsigned int PENDSVACT : 1; // Read as 1 if PendSV exception is activeunsigned int SYSTICKACT : 1; // Read as 1 if SYSTICK exception is activeunsigned int USGFAULTPENDED : 1; // Usage fault pended; usage fault started but was replaced by a higher-priority exceptionunsigned int MEMFAULTPENDED : 1; // Memory management fault pended; memory management fault started but was replaced by a higher-priority exceptionunsigned int BUSFAULTPENDED : 1; // Bus fault pended; bus fault handler was started but was replaced by a higher-priority exceptionunsigned int SVCALLPENDED : 1; // SVC pended; SVC was started but was replaced by a higher-priority exceptionunsigned int MEMFAULTENA : 1; // Memory management fault handler enableunsigned int BUSFAULTENA : 1; // Bus fault handler enableunsigned int USGFAULTENA : 1; // Usage fault handler enable} bits;} syshndctrl; // System Handler Control and State Register (0xE000ED24)union {volatile unsigned char byte;struct {unsigned char IACCVIOL : 1; // Instruction access violationunsigned char DACCVIOL : 1; // Data access violationunsigned char UnusedBits : 1;unsigned char MUNSTKERR : 1; // Unstacking errorunsigned char MSTKERR : 1; // Stacking errorunsigned char UnusedBits2 : 2;unsigned char MMARVALID : 1; // Indicates the MMAR is valid} bits;} mfsr; // Memory Management Fault Status Register (0xE000ED28)union {volatile unsigned int byte;struct {unsigned int IBUSERR : 1; // Instruction access violationunsigned int PRECISERR : 1; // Precise data access violationunsigned int IMPREISERR : 1; // Imprecise data access violationunsigned int UNSTKERR : 1; // Unstacking errorunsigned int STKERR : 1; // Stacking errorunsigned int UnusedBits : 2;unsigned int BFARVALID : 1; // Indicates BFAR is valid} bits;} bfsr; // Bus Fault Status Register (0xE000ED29)volatile unsigned int bfar; // Bus Fault Manage Address Register (0xE000ED38)union {volatile unsigned short byte;struct {unsigned short UNDEFINSTR : 1; // Attempts to execute an undefined instructionunsigned short INVSTATE : 1; // Attempts to switch to an invalid state (e.g., ARM)unsigned short INVPC : 1; // Attempts to do an exception with a bad value in the EXC_RETURN numberunsigned short NOCP : 1; // Attempts to execute a coprocessor instructionunsigned short UnusedBits : 4;unsigned short UNALIGNED : 1; // Indicates that an unaligned access fault has taken placeunsigned short DIVBYZERO : 1; // Indicates a divide by zero has taken place (can be set only if DIV_0_TRP is set)} bits;} ufsr; // Usage Fault Status Register (0xE000ED2A)union {volatile unsigned int byte;struct {unsigned int UnusedBits : 1;unsigned int VECTBL : 1; // Indicates hard fault is caused by failed vector fetchunsigned int UnusedBits2 : 28;unsigned int FORCED : 1; // Indicates hard fault is taken because of bus fault/memory management fault/usage faultunsigned int DEBUGEVT : 1; // Indicates hard fault is triggered by debug event} bits;} hfsr; // Hard Fault Status Register (0xE000ED2C)union {volatile unsigned int byte;struct {unsigned int HALTED : 1; // Halt requested in NVICunsigned int BKPT : 1; // BKPT instruction executedunsigned int DWTTRAP : 1; // DWT match occurredunsigned int VCATCH : 1; // Vector fetch occurredunsigned int EXTERNAL : 1; // EDBGRQ signal asserted} bits;} dfsr; // Debug Fault Status Register (0xE000ED30)volatile unsigned int afsr; // Auxiliary Fault Status Register (0xE000ED3C), Vendor controlled (optional)
} HardFaultRegs;
#endif/*********************************************************************
*
* Global functions
*
**********************************************************************
*//*********************************************************************
*
* HardFaultHandler()
*
* Function description
* C part of the hard fault handler which is called by the assembler
* function HardFault_Handler
*/
void HardFaultHandler(unsigned int* pStack) {//// In case we received a hard fault because of a breakpoint instruction, we return.// This may happen when using semihosting for printf outputs and no debugger is connected,// i.e. when running a "Debug" configuration in release mode.//if (NVIC_HFSR & (1u << 31)) {NVIC_HFSR |= (1u << 31); // Reset Hard Fault status*(pStack + 6u) += 2u; // PC is located on stack at SP + 24 bytes. Increment PC by 2 to skip break instruction.return; // Return to interrupted application}
#if DEBUG//// Read NVIC registers//HardFaultRegs.syshndctrl.byte = SYSHND_CTRL; // System Handler Control and State RegisterHardFaultRegs.mfsr.byte = NVIC_MFSR; // Memory Fault Status RegisterHardFaultRegs.bfsr.byte = NVIC_BFSR; // Bus Fault Status RegisterHardFaultRegs.bfar = NVIC_BFAR; // Bus Fault Manage Address RegisterHardFaultRegs.ufsr.byte = NVIC_UFSR; // Usage Fault Status RegisterHardFaultRegs.hfsr.byte = NVIC_HFSR; // Hard Fault Status RegisterHardFaultRegs.dfsr.byte = NVIC_DFSR; // Debug Fault Status RegisterHardFaultRegs.afsr = NVIC_AFSR; // Auxiliary Fault Status Register//// Halt execution// If NVIC registers indicate readable memory, change the variable value to != 0 to continue execution.//_Continue = 0u;while (_Continue == 0u) {}//// Read saved registers from the stack.//HardFaultRegs.SavedRegs.r0 = pStack[0]; // Register R0HardFaultRegs.SavedRegs.r1 = pStack[1]; // Register R1HardFaultRegs.SavedRegs.r2 = pStack[2]; // Register R2HardFaultRegs.SavedRegs.r3 = pStack[3]; // Register R3HardFaultRegs.SavedRegs.r12 = pStack[4]; // Register R12HardFaultRegs.SavedRegs.lr = pStack[5]; // Link register LRHardFaultRegs.SavedRegs.pc = pStack[6]; // Program counter PCHardFaultRegs.SavedRegs.psr.byte = pStack[7]; // Program status word PSR//// Halt execution// To step out of the HardFaultHandler, change the variable value to != 0.//_Continue = 0u;while (_Continue == 0u) {}
#else//// If this module is included in a release configuration, simply stay in the HardFault handler//(void)pStack;do {} while (1);
#endif
}/*************************** End of file ****************************/
参考文档阿里云盘链接：
https://www.aliyundrive.com/s/hUXEzTipXrv
参考链接：
HardFault 问题定位 - 大大通一、概述 相信大家都遇到过 HardFault 的问题，这个问题最锻炼人心态的地方是不知道具体是程序哪里的问题导致的，如果不能确定问题产生的地方，就只能靠不停的推测、验证、再推测、再验证…… 这样无疑会大大拉低效率，那么有没有什么办法能定位到程序的具体语句呢？当然有，各 IDE 和烧录器们可不是吃素
https://www.wpgdadatong.com/cn/blog/detail?BID=B3611
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