ARM裸机篇---启动代码分析
2024-04-24 01:58:39
ARM裸机篇---启动代码分析
先搞清楚启动代码和Bootloader的区别，启动代码是指CPU复位后到进入C语言的main函数之前需要执行的那段汇编代码。
下面的代码先暂且这样吧，没啥注释的，时间关系，我还是先搞些应用再说^_^
;=========================================
; NAME: 2410INIT.S
; DESC: C start up codes
; Configure memory, ISR ,stacks
; Initialize C-variables
; HISTORY:
; 2002.02.25:kwtark: ver 0.0
; 2002.03.20:purnnamu: Add some functions for testing STOP,POWER_OFF mode
; 2002.04.10:SJS:sub interrupt disable 0x3ff -> 0x7ff
;=========================================GET option.sGET memcfg.sGET 2410addr.s BIT_SELFREFRESH EQU (1<<22);Pre-defined constants
USERMODE EQU 0x10
FIQMODE EQU 0x11
IRQMODE EQU 0x12
SVCMODE EQU 0x13
ABORTMODE EQU 0x17
UNDEFMODE EQU 0x1b
MODEMASK EQU 0x1f
NOINT EQU 0xc0;The location of stacks
UserStack EQU (_STACK_BASEADDRESS-0x3800) ;0x33ff4800 ~
SVCStack EQU (_STACK_BASEADDRESS-0x2800) ;0x33ff5800 ~
UndefStack EQU (_STACK_BASEADDRESS-0x2400) ;0x33ff5c00 ~
AbortStack EQU (_STACK_BASEADDRESS-0x2000) ;0x33ff6000 ~
IRQStack EQU (_STACK_BASEADDRESS-0x1000) ;0x33ff7000 ~
FIQStack EQU (_STACK_BASEADDRESS-0x0) ;0x33ff8000 ~ ;Check if tasm.exe(armasm -16 ...@ADS 1.0) is used.GBLL THUMBCODE[ {CONFIG} = 16
THUMBCODE SETL {TRUE}CODE32|
THUMBCODE SETL {FALSE}]MACROMOV_PC_LR[ THUMBCODEbx lr|mov pc,lr]MENDMACROMOVEQ_PC_LR[ THUMBCODEbxeq lr|moveq pc,lr] MENDMACRO
$HandlerLabel HANDLER $HandleLabel$HandlerLabelsub sp,sp,#4 ;decrement sp(to store jump address)stmfd sp!,{r0} ;PUSH the work register to stack(lr does't push because it return to original address)ldr r0,=$HandleLabel;load the address of HandleXXX to r0ldr r0,[r0] ;load the contents(service routine start address) of HandleXXXstr r0,[sp,#4] ;store the contents(ISR) of HandleXXX to stackldmfd sp!,{r0,pc} ;POP the work register and pc(jump to ISR)MENDIMPORT |Image$$RO$$Limit| ; End of ROM code (=start of ROM data)IMPORT |Image$$RW$$Base| ; Base of RAM to initialiseIMPORT |Image$$ZI$$Base| ; Base and limit of areaIMPORT |Image$$ZI$$Limit| ; to zero initialiseIMPORT Main ; The main entry of mon program AREA Init,CODE,READONLYENTRY ;1)The code, which converts to Big-endian, should be in little endian code.;2)The following little endian code will be compiled in Big-Endian mode. ; The code byte order should be changed as the memory bus width.;3)The pseudo instruction,DCD can't be used here because the linker generates error.ASSERT :DEF:ENDIAN_CHANGE[ ENDIAN_CHANGEASSERT :DEF:ENTRY_BUS_WIDTH[ ENTRY_BUS_WIDTH=32b ChangeBigEndian ;DCD 0xea000007 ][ ENTRY_BUS_WIDTH=16andeq r14,r7,r0,lsl #20 ;DCD 0x0007ea00][ ENTRY_BUS_WIDTH=8streq r0,[r0,-r10,ror #1] ;DCD 0x070000ea]|b ResetHandler ]b HandlerUndef ;handler for Undefined modeb HandlerSWI ;handler for SWI interruptb HandlerPabort ;handler for PAbortb HandlerDabort ;handler for DAbortb . ;reservedb HandlerIRQ ;handler for IRQ interrupt b HandlerFIQ ;handler for FIQ interrupt;@0x20b EnterPWDN
ChangeBigEndian
;@0x24[ ENTRY_BUS_WIDTH=32DCD 0xee110f10 ;0xee110f10 => mrc p15,0,r0,c1,c0,0DCD 0xe3800080 ;0xe3800080 => orr r0,r0,#0x80; //Big-endianDCD 0xee010f10 ;0xee010f10 => mcr p15,0,r0,c1,c0,0][ ENTRY_BUS_WIDTH=16DCD 0x0f10ee11DCD 0x0080e380 DCD 0x0f10ee01 ][ ENTRY_BUS_WIDTH=8DCD 0x100f11ee DCD 0x800080e3 DCD 0x100f01ee ]DCD 0xffffffff ;swinv 0xffffff is similar with NOP and run well in both endian mode. DCD 0xffffffffDCD 0xffffffffDCD 0xffffffffDCD 0xffffffffb ResetHandler;Function for entering power down mode
; 1. SDRAM should be in self-refresh mode.
; 2. All interrupt should be maksked for SDRAM/DRAM self-refresh.
; 3. LCD controller should be disabled for SDRAM/DRAM self-refresh.
; 4. The I-cache may have to be turned on.
; 5. The location of the following code may have not to be changed.;void EnterPWDN(int CLKCON);
EnterPWDN mov r2,r0 ;r2=rCLKCONtst r0,#0x8 ;POWER_OFF mode?bne ENTER_POWER_OFFENTER_STOP ldr r0,=REFRESH ldr r3,[r0] ;r3=rREFRESH mov r1, r3orr r1, r1, #BIT_SELFREFRESHstr r1, [r0] ;Enable SDRAM self-refreshmov r1,#16 ;wait until self-refresh is issued. may not be needed.
0 subs r1,r1,#1bne %B0ldr r0,=CLKCON ;enter STOP mode.str r2,[r0] mov r1,#32
0 subs r1,r1,#1 ;1) wait until the STOP mode is in effect.bne %B0 ;2) Or wait here until the CPU&Peripherals will be turned-off; Entering POWER_OFF mode, only the reset by wake-up is available.ldr r0,=REFRESH ;exit from SDRAM self refresh mode.str r3,[r0]MOV_PC_LRENTER_POWER_OFF ;NOTE.;1) rGSTATUS3 should have the return address after wake-up from POWER_OFF mode.ldr r0,=REFRESH ldr r1,[r0] ;r1=rREFRESH orr r1, r1, #BIT_SELFREFRESHstr r1, [r0] ;Enable SDRAM self-refreshmov r1,#16 ;Wait until self-refresh is issued,which may not be needed.
0 subs r1,r1,#1bne %B0ldr r1,=MISCCRldr r0,[r1]orr r0,r0,#(7<<17) ;Make sure that SCLK0:SCLK->0, SCLK1:SCLK->0, SCKE=L during boot-up str r0,[r1]ldr r0,=CLKCONstr r2,[r0] b . ;CPU will die here.WAKEUP_POWER_OFF;Release SCLKn after wake-up from the POWER_OFF mode.ldr r1,=MISCCRldr r0,[r1]bic r0,r0,#(7<<17) ;SCLK0:0->SCLK, SCLK1:0->SCLK, SCKE:L->Hstr r0,[r1];Set memory control registersldr r0,=SMRDATAldr r1,=BWSCON ;BWSCON Addressadd r2, r0, #52 ;End address of SMRDATA
0 ldr r3, [r0], #4 str r3, [r1], #4 cmp r2, r0 bne %B0mov r1,#256
0 subs r1,r1,#1 ;1) wait until the SelfRefresh is released.bne %B0 ldr r1,=GSTATUS3 ;GSTATUS3 has the start address just after POWER_OFF wake-upldr r0,[r1]mov pc,r0LTORG
HandlerFIQ HANDLER HandleFIQ
HandlerIRQ HANDLER HandleIRQ
HandlerUndef HANDLER HandleUndef
HandlerSWI HANDLER HandleSWI
HandlerDabort HANDLER HandleDabort
HandlerPabort HANDLER HandlePabortIsrIRQ sub sp,sp,#4 ;reserved for PCstmfd sp!,{r8-r9} ldr r9,=INTOFFSETldr r9,[r9]ldr r8,=HandleEINT0add r8,r8,r9,lsl #2ldr r8,[r8]str r8,[sp,#8]ldmfd sp!,{r8-r9,pc};=======
; ENTRY
;=======
ResetHandlerldr r0,=WTCON ;watch dog disable ldr r1,=0x0 str r1,[r0]ldr r0,=INTMSKldr r1,=0xffffffff ;all interrupt disablestr r1,[r0]ldr r0,=INTSUBMSKldr r1,=0x7ff ;all sub interrupt disable, 2002/04/10str r1,[r0][ {FALSE}; rGPFDAT = (rGPFDAT & ~(0xf<<4)) | ((~data & 0xf)<<4); ; Led_Displayldr r0,=GPFCONldr r1,=0x5500 str r1,[r0]ldr r0,=GPFDATldr r1,=0x10str r1,[r0]];To reduce PLL lock time, adjust the LOCKTIME register. ldr r0,=LOCKTIMEldr r1,=0xffffffstr r1,[r0][ PLL_ON_START;Configure MPLLldr r0,=MPLLCON ldr r1,=((M_MDIV<<12)+(M_PDIV<<4)+M_SDIV) ;Fin=12MHz,Fout=50MHzstr r1,[r0]];Check if the boot is caused by the wake-up from POWER_OFF mode.ldr r1,=GSTATUS2ldr r0,[r1]tst r0,#0x2;In case of the wake-up from POWER_OFF mode, go to POWER_OFF_WAKEUP handler. bne WAKEUP_POWER_OFFEXPORT StartPointAfterPowerOffWakeUp
StartPointAfterPowerOffWakeUp;Set memory control registersldr r0,=SMRDATAldr r1,=BWSCON ;BWSCON Addressadd r2, r0, #52 ;End address of SMRDATA
0 ldr r3, [r0], #4 str r3, [r1], #4 cmp r2, r0 bne %B0;Initialize stacksbl InitStacks; Setup IRQ handlerldr r0,=HandleIRQ ;This routine is neededldr r1,=IsrIRQ ;if there isn't 'subs pc,lr,#4' at 0x18, 0x1cstr r1,[r0];Copy and paste RW data/zero initialized dataldr r0, =|Image$$RO$$Limit| ; Get pointer to ROM dataldr r1, =|Image$$RW$$Base| ; and RAM copyldr r3, =|Image$$ZI$$Base| ;Zero init base => top of initialised datacmp r0, r1 ; Check that they are differentbeq %F2
1 cmp r1, r3 ; Copy init dataldrcc r2, [r0], #4 ;--> LDRCC r2, [r0] + ADD r0, r0, #4 strcc r2, [r1], #4 ;--> STRCC r2, [r1] + ADD r1, r1, #4bcc %B1
2 ldr r1, =|Image$$ZI$$Limit| ; Top of zero init segmentmov r2, #0
3 cmp r3, r1 ; Zero initstrcc r2, [r3], #4bcc %B3[ :LNOT:THUMBCODEbl Main ;Don't use main() because ......b . ][ THUMBCODE ;for start-up code for Thumb modeorr lr,pc,#1bx lrCODE16bl Main ;Don't use main() because ......b .CODE32];function initializing stacks
InitStacks;Don't use DRAM,such as stmfd,ldmfd......;SVCstack is initialized before;Under toolkit ver 2.5, 'msr cpsr,r1' can be used instead of 'msr cpsr_cxsf,r1'mrs r0,cpsrbic r0,r0,#MODEMASKorr r1,r0,#UNDEFMODE|NOINTmsr cpsr_cxsf,r1 ;UndefModeldr sp,=UndefStackorr r1,r0,#ABORTMODE|NOINTmsr cpsr_cxsf,r1 ;AbortModeldr sp,=AbortStackorr r1,r0,#IRQMODE|NOINTmsr cpsr_cxsf,r1 ;IRQModeldr sp,=IRQStackorr r1,r0,#FIQMODE|NOINTmsr cpsr_cxsf,r1 ;FIQModeldr sp,=FIQStackbic r0,r0,#MODEMASK|NOINTorr r1,r0,#SVCMODEmsr cpsr_cxsf,r1 ;SVCModeldr sp,=SVCStack;USER mode has not be initialized.mov pc,lr ;The LR register won't be valid if the current mode is not SVC mode.LTORGSMRDATA DATA
; Memory configuration should be optimized for best performance
; The following parameter is not optimized.
; Memory access cycle parameter strategy
; 1) The memory settings is safe parameters even at HCLK=75Mhz.
; 2) SDRAM refresh period is for HCLK=75Mhz. DCD (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28))DCD ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC)) ;GCS0DCD ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC)) ;GCS1 DCD ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC)) ;GCS2DCD ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC)) ;GCS3DCD ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC)) ;GCS4DCD ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC)) ;GCS5DCD ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN)) ;GCS6DCD ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN)) ;GCS7DCD ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT) DCD 0x32 ;SCLK power saving mode, BANKSIZE 128M/128MDCD 0x30 ;MRSR6 CL=3clkDCD 0x30 ;MRSR7
; DCD 0x20 ;MRSR6 CL=2clk
; DCD 0x20 ;MRSR7ALIGNAREA RamData, DATA, READWRITE^ _ISR_STARTADDRESS
HandleReset # 4
HandleUndef # 4
HandleSWI # 4
HandlePabort # 4
HandleDabort # 4
HandleReserved # 4
HandleIRQ # 4
HandleFIQ # 4;Don't use the label 'IntVectorTable',
;The value of IntVectorTable is different with the address you think it may be.
;IntVectorTable
HandleEINT0 # 4
HandleEINT1 # 4
HandleEINT2 # 4
HandleEINT3 # 4
HandleEINT4_7 # 4
HandleEINT8_23 # 4
HandleRSV6 # 4
HandleBATFLT # 4
HandleTICK # 4
HandleWDT # 4
HandleTIMER0 # 4
HandleTIMER1 # 4
HandleTIMER2 # 4
HandleTIMER3 # 4
HandleTIMER4 # 4
HandleUART2 # 4
HandleLCD # 4
HandleDMA0 # 4
HandleDMA1 # 4
HandleDMA2 # 4
HandleDMA3 # 4
HandleMMC # 4
HandleSPI0 # 4
HandleUART1 # 4
HandleRSV24 # 4
HandleUSBD # 4
HandleUSBH # 4
HandleIIC # 4
HandleUART0 # 4
HandleSPI1 # 4
HandleRTC # 4
HandleADC # 4END
上面这个还没啥注释的，下面请看这个有注释的吧，这个是实验室买的设备带的：
;*--------------------------------------------- 文件信息 ----------------------------------------------------
;*
;* 文件名称 : 2410INIT.S
;* 文件功能 : 该文件为ARM9硬件平台的C语言启动代码，用于分配中断向量表，初始化ISR地址，初始化堆栈空间，
;* 初始化应用程序执行环境，配置存储器系统，设定时钟周期，呼叫主应用程序。
;* 补充说明 : 基于S3C2410的ARM9硬件平台的启动代码
;*-------------------------------------------- 最新版本信息 -------------------------------------------------
;* 修改作者 : ARM开发小组
;* 修改日期 : 2005/08/23
;* 版本声明 : V1.0.1
;*-------------------------------------------- 历史版本信息 -------------------------------------------------
;* 文件作者 : ARM开发小组
;* 创建日期 : 2004/04/20
;* 版本声明 : v1.0.0
;*-----------------------------------------------------------------------------------------------------------
;*-----------------------------------------------------------------------------------------------------------
;************************************************************************************************************
;*/GET option.sGET memcfg.sGET 2410addr.sBIT_SELFREFRESH EQU (1<<22);//Pre-defined constants
USERMODE EQU 0x10
FIQMODE EQU 0x11
IRQMODE EQU 0x12
SVCMODE EQU 0x13
ABORTMODE EQU 0x17
UNDEFMODE EQU 0x1b
MODEMASK EQU 0x1f
NOINT EQU 0xc0;//The location of stacks
UserStack EQU (_STACK_BASEADDRESS-0x3800) ;//0x33ff4800 ~
SVCStack EQU (_STACK_BASEADDRESS-0x2800) ;//0x33ff5800 ~
UndefStack EQU (_STACK_BASEADDRESS-0x2400) ;//0x33ff5c00 ~
AbortStack EQU (_STACK_BASEADDRESS-0x2000) ;//0x33ff6000 ~
IRQStack EQU (_STACK_BASEADDRESS-0x1000) ;//0x33ff7000 ~
FIQStack EQU (_STACK_BASEADDRESS-0x0) ;//0x33ff8000 ~ ;//Check if tasm.exe(armasm -16 ...@ADS 1.0) is used.GBLL THUMBCODE[ {CONFIG} = 16 THUMBCODE SETL {TRUE}CODE32|
THUMBCODE SETL {FALSE}]MACROMOV_PC_LR[ THUMBCODEbx lr|mov pc,lr]MENDMACROMOVEQ_PC_LR[ THUMBCODEbxeq lr|moveq pc,lr]MENDMACRO
$HandlerLabel HANDLER $HandleLabel$HandlerLabelsub sp,sp,#4 ;//decrement sp(to store jump address)stmfd sp!,{r0} ;//PUSH the work register to stack(lr does't push because it return to original address)ldr r0,=$HandleLabel;//load the address of HandleXXX to r0ldr r0,[r0] ;//load the contents(service routine start address) of HandleXXXstr r0,[sp,#4] ;//store the contents(ISR) of HandleXXX to stackldmfd sp!,{r0,pc} ;//POP the work register and pc(jump to ISR)MENDIMPORT |Image$$RO$$Limit| ;// End of ROM code (=start of ROM data)IMPORT |Image$$RW$$Base| ;// Base of RAM to initialiseIMPORT |Image$$ZI$$Base| ;// Base and limit of areaIMPORT |Image$$ZI$$Limit| ;// to zero initialise;//IMPORT Main ;// The main entry of mon program AREA Init,CODE,READONLYENTRY ; //1)The code, which converts to Big-endian, should be in little endian code.; //2)The following little endian code will be compiled in Big-Endian mode. ; // The code byte order should be changed as the memory bus width.; //3)The pseudo instruction,DCD can't be used here because the linker generates error.ASSERT :DEF:ENDIAN_CHANGE[ ENDIAN_CHANGEASSERT :DEF:ENTRY_BUS_WIDTH[ ENTRY_BUS_WIDTH=32b ChangeBigEndian ;//DCD 0xea000007 ][ ENTRY_BUS_WIDTH=16andeq r14,r7,r0,lsl #20 ;//DCD 0x0007ea00][ ENTRY_BUS_WIDTH=8streq r0,[r0,-r10,ror #1] ;//DCD 0x070000ea]|b ResetHandler ]b HandlerUndef ;//handler for Undefined modeb HandlerSWI ;//handler for SWI interruptb HandlerPabort ;//handler for PAbortb HandlerDabort ;//handler for DAbortb . ;//reservedb HandlerIRQ ;//handler for IRQ interrupt b HandlerFIQ ;//handler for FIQ interrupt;//@0x20b EnterPWDN
ChangeBigEndian
;//@0x24[ ENTRY_BUS_WIDTH=32DCD 0xee110f10 ;//0xee110f10 => mrc p15,0,r0,c1,c0,0DCD 0xe3800080 ;//0xe3800080 => orr r0,r0,#0x80; //Big-endianDCD 0xee010f10 ;//0xee010f10 => mcr p15,0,r0,c1,c0,0][ ENTRY_BUS_WIDTH=16DCD 0x0f10ee11DCD 0x0080e380 DCD 0x0f10ee01 ][ ENTRY_BUS_WIDTH=8DCD 0x100f11ee DCD 0x800080e3 DCD 0x100f01ee ]DCD 0xffffffff ;//swinv 0xffffff is similar with NOP and run well in both endian mode. DCD 0xffffffffDCD 0xffffffffDCD 0xffffffffDCD 0xffffffffb ResetHandler;//Function for entering power down mode
;// 1. SDRAM should be in self-refresh mode.
;// 2. All interrupt should be maksked for SDRAM/DRAM self-refresh.
;// 3. LCD controller should be disabled for SDRAM/DRAM self-refresh.
;// 4. The I-cache may have to be turned on.
;// 5. The location of the following code may have not to be changed.;//void EnterPWDN(int CLKCON);
EnterPWDN mov r2,r0 ;//r2=rCLKCONtst r0,#0x8 ;//POWER_OFF mode?bne ENTER_POWER_OFFENTER_STOP ldr r0,=REFRESH ldr r3,[r0] ;//r3=rREFRESH mov r1, r3orr r1, r1, #BIT_SELFREFRESHstr r1, [r0] ;//Enable SDRAM self-refreshmov r1,#16 ;//wait until self-refresh is issued. may not be needed.
0 subs r1,r1,#1bne %B0ldr r0,=CLKCON ;//enter STOP mode.str r2,[r0] mov r1,#32
0 subs r1,r1,#1 ;//1) wait until the STOP mode is in effect.bne %B0 ;//2) Or wait here until the CPU&Peripherals will be turned-off;// Entering POWER_OFF mode, only the reset by wake-up is available.ldr r0,=REFRESH ;//exit from SDRAM self refresh mode.str r3,[r0]MOV_PC_LRENTER_POWER_OFF ;//NOTE.;//1) rGSTATUS3 should have the return address after wake-up from POWER_OFF mode.ldr r0,=REFRESH ldr r1,[r0] ;r1=rREFRESH orr r1, r1, #BIT_SELFREFRESHstr r1, [r0] ;//Enable SDRAM self-refreshmov r1,#16 ;//Wait until self-refresh is issued,which may not be needed.
0 subs r1,r1,#1bne %B0ldr r1,=MISCCRldr r0,[r1]orr r0,r0,#(7<<17) ;//Make sure that SCLK0:SCLK->0, SCLK1:SCLK->0, SCKE=L during boot-up str r0,[r1]ldr r0,=CLKCONstr r2,[r0] b . ;//CPU will die here.WAKEUP_POWER_OFF;//Release SCLKn after wake-up from the POWER_OFF mode.ldr r1,=MISCCRldr r0,[r1]bic r0,r0,#(7<<17) ;//SCLK0:0->SCLK, SCLK1:0->SCLK, SCKE:L->Hstr r0,[r1];//Set memory control registersldr r0,=SMRDATAldr r1,=BWSCON ;//BWSCON Addressadd r2, r0, #52 ;//End address of SMRDATA
0 ldr r3, [r0], #4 str r3, [r1], #4 cmp r2, r0 bne %B0mov r1,#256
0 subs r1,r1,#1 ;//1) wait until the SelfRefresh is released.bne %B0 ldr r1,=GSTATUS3 ;//GSTATUS3 has the start address just after POWER_OFF wake-upldr r0,[r1]mov pc,r0LTORG
HandlerFIQ HANDLER HandleFIQ
HandlerIRQ HANDLER HandleIRQ
HandlerUndef HANDLER HandleUndef
HandlerSWI HANDLER HandleSWI
HandlerDabort HANDLER HandleDabort
HandlerPabort HANDLER HandlePabortIsrIRQ sub sp,sp,#4 ;//reserved for PCstmfd sp!,{r8-r9} ldr r9,=INTOFFSETldr r9,[r9]ldr r8,=HandleEINT0add r8,r8,r9,lsl #2ldr r8,[r8]str r8,[sp,#8]ldmfd sp!,{r8-r9,pc};//====================================================================
;// ENTRY
;//===================================================================
ResetHandlerldr r0,=WTCON ;//watch dog disable ldr r1,=0x0 str r1,[r0]ldr r0,=INTMSKldr r1,=0xffffffff ;//all interrupt disablestr r1,[r0]ldr r0,=INTSUBMSKldr r1,=0x7ff ;//all sub interrupt disable, 2002/04/10str r1,[r0][ {FALSE};// rGPFDAT = (rGPFDAT & ~(0xf<<4)) | ((~data & 0xf)<<4); ;// Led_Displayldr r0,=GPFCONldr r1,=0x5500 str r1,[r0]ldr r0,=GPFDATldr r1,=0x10str r1,[r0]];//To reduce PLL lock time, adjust the LOCKTIME register. ldr r0,=LOCKTIMEldr r1,=0xffffffstr r1,[r0][ PLL_ON_START;//Configure MPLLldr r0,=MPLLCON ldr r1,=((0xa1<<12)+(3<<4)+0x1) ;//Fin=12MHz,Fout=50MHzstr r1,[r0]];//Check if the boot is caused by the wake-up from POWER_OFF mode.ldr r1,=GSTATUS2ldr r0,[r1]tst r0,#0x2;//In case of the wake-up from POWER_OFF mode, go to POWER_OFF_WAKEUP handler. bne WAKEUP_POWER_OFFEXPORT StartPointAfterPowerOffWakeUp
StartPointAfterPowerOffWakeUp;//Set memory control registersldr r0,=SMRDATAldr r1,=BWSCON ;//BWSCON Addressadd r2, r0, #52 ;//End address of SMRDATA
0 ldr r3, [r0], #4 str r3, [r1], #4 cmp r2, r0 bne %B0;//Initialize stacksbl InitStacks;// Setup IRQ handlerldr r0,=HandleIRQ ;//This routine is neededldr r1,=IsrIRQ ;//if there isn't 'subs pc,lr,#4' at 0x18, 0x1cstr r1,[r0];//Copy and paste RW data/zero initialized dataldr r0, =|Image$$RO$$Limit| ; Get pointer to ROM dataldr r1, =|Image$$RW$$Base| ; and RAM copyldr r3, =|Image$$ZI$$Base| ;//Zero init base => top of initialised datacmp r0, r1 ;// Check that they are differentbeq %F2
1 cmp r1, r3 ;// Copy init dataldrcc r2, [r0], #4 ;//--> LDRCC r2, [r0] + ADD r0, r0, #4 strcc r2, [r1], #4 ;//--> STRCC r2, [r1] + ADD r1, r1, #4bcc %B1
2 ldr r1, =|Image$$ZI$$Limit| ;// Top of zero init segmentmov r2, #0
3 cmp r3, r1 ;// Zero initstrcc r2, [r3], #4bcc %B3;//呼叫主应用程序b UART
UARTldr r0, =GPHCON ;//设置RxD0,TxD0引脚ldr r1, =0x2afaaastr r1, [r0]ldr r0, =GPHUPldr r1, =0x7ffstr r1, [r0] ; // The pull up function is disabled GPH[10:0]ldr r0, =UFCON0 ;//禁用FIFOldr r1, =0x0str r1, [r0]ldr r0, =UMCON0 ;//禁用AFCldr r1, =0x0str r1, [r0]ldr r0, =ULCON0 ;//设置线寄存器ldr r1, =0x3 ; //UART LINE CONFIG 正常模式,无奇偶校验,一个停止位,8个数据位str r1, [r0]ldr r0, =UCON0 ;//设置Uart0控制器ldr r1, =0x245;//RX边沿触发,TX电平触发,禁用延时中断,使用RX 错误中断,正常操作模式,中断请求或表决模式str r1, [r0]ldr r0, =UBRDIV0 ;//设置波特率为115200ldr r1, =0x1a ;//int(50700000 / 16 / 115200) - 1 = 26str r1, [r0]mov r1, #100
Delaysub r1, r1, #0x1bne Delay;//开中断ldr r0, =INTMSKldr r1, [r0]and r1, r1, #0xefffffffstr r1, [r0]MOV R5 , #127 ;//设置要打印的字符的个数MOV R1 , #0x0 ;//设置要打印的字符
LOOP LDR R3 , =UTRSTAT0LDR R2 , [R3]TST R2 ,#0x04 ;//判断发送缓冲区是否为空BEQ LOOP ;//为空则执行下边的语句，不为空则跳转到LOOPLDR R0 , =UTXH0STR R1 ,[R0] ;//向数据缓冲区放置要发送的数据ADD R1, R1, #1SUB R5 ,R5, #0x01 ;//计数器减一CMP R5 ,#0x0BNE LOOPLOOP2 B LOOP2 ; /*
; pclk = PCLK;
; rUFCON0 = 0x0; //UART channel 0 FIFO control register, FIFO disable
; rUFCON1 = 0x0; //UART channel 1 FIFO control register, FIFO disable
; rUFCON2 = 0x0; //UART channel 2 FIFO control register, FIFO disable
; rUMCON0 = 0x0; //UART chaneel 0 MODEM control register, AFC disable
; rUMCON1 = 0x0; //UART chaneel 1 MODEM control register, AFC disable;//UART0
; rULCON0 = 0x3; //Line control register : Normal,No parity,1 stop,8 bits
; // [10] [9] [8] [7] [6] [5] [4] [3:2] [1:0]
; // Clock Sel, Tx Int, Rx Int, Rx Time Out, Rx err, Loop-back, Send break, Transmit Mode, Receive Mode
; // 0 1 0 , 0 1 0 0 , 01 01
; // PCLK Level Pulse Disable Generate Normal Normal Interrupt or Polling
; rUCON0 = 0x245; // Control register
;// rUBRDIV0=( (int)(pclk/16./baud) -1 ); //Baud rate divisior register 0
; rUBRDIV0=( (int)(pclk/16./baud+0.5) -1 ); //Baud rate divisior register 0 ;//UART1
; rULCON1 = 0x3;
; rUCON1 = 0x245;
; rUBRDIV1=( (int)(pclk/16./baud) -1 );
;
;//UART2
; rULCON2 = 0x3;
; rUCON2 = 0x245;
; rUBRDIV2=( (int)(pclk/16./baud) -1 );
;
; for(i=0;i<100;i++);
;
; */;//END OF UART HERE;//function initializing stacks
InitStacks;//Don't use DRAM,such as stmfd,ldmfd......;//SVCstack is initialized before;//Under toolkit ver 2.5, 'msr cpsr,r1' can be used instead of 'msr cpsr_cxsf,r1'mrs r0,cpsrbic r0,r0,#MODEMASKorr r1,r0,#UNDEFMODE|NOINTmsr cpsr_cxsf,r1 ;//UndefModeldr sp,=UndefStackorr r1,r0,#ABORTMODE|NOINTmsr cpsr_cxsf,r1 ;//AbortModeldr sp,=AbortStackorr r1,r0,#IRQMODE|NOINTmsr cpsr_cxsf,r1 ;//IRQModeldr sp,=IRQStackorr r1,r0,#FIQMODE|NOINTmsr cpsr_cxsf,r1 ;//FIQModeldr sp,=FIQStackbic r0,r0,#MODEMASK|NOINTorr r1,r0,#SVCMODEmsr cpsr_cxsf,r1 ;//SVCModeldr sp,=SVCStack;//USER mode has not be initialized.mov pc,lr ;//The LR register won't be valid if the current mode is not SVC mode.LTORG
; incbin ..\..\Font\Hzk16.bin
SMRDATA DATA
;// Memory configuration should be optimized for best performance
;// The following parameter is not optimized.
;// Memory access cycle parameter strategy
;// 1) The memory settings is safe parameters even at HCLK=75Mhz.
;// 2) SDRAM refresh period is for HCLK=75Mhz. DCD (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28))DCD ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC)) ;//GCS0DCD ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC)) ;//GCS1 DCD ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC)) ;//GCS2DCD ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC)) ;//GCS3DCD ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC)) ;//GCS4DCD ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC)) ;//GCS5DCD ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN)) ;//GCS6DCD ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN)) ;//GCS7DCD ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT) DCD 0x32 ;//SCLK power saving mode, BANKSIZE 128M/128MDCD 0x30 ;//MRSR6 CL=3clkDCD 0x30 ;//MRSR7
;// DCD 0x20 ;//MRSR6 CL=2clk
;/// DCD 0x20 ;//MRSR7ALIGNAREA RamData, DATA, READWRITE^ _ISR_STARTADDRESS
HandleReset # 4
HandleUndef # 4
HandleSWI # 4
HandlePabort # 4
HandleDabort # 4
HandleReserved # 4
HandleIRQ # 4
HandleFIQ # 4;//Don't use the label 'IntVectorTable',
;//The value of IntVectorTable is different with the address you think it may be.
;//IntVectorTable
HandleEINT0 # 4
HandleEINT1 # 4
HandleEINT2 # 4
HandleEINT3 # 4
HandleEINT4_7 # 4
HandleEINT8_23 # 4
HandleRSV6 # 4
HandleBATFLT # 4
HandleTICK # 4
HandleWDT # 4
HandleTIMER0 # 4
HandleTIMER1 # 4
HandleTIMER2 # 4
HandleTIMER3 # 4
HandleTIMER4 # 4
HandleUART2 # 4
HandleLCD # 4
HandleDMA0 # 4
HandleDMA1 # 4
HandleDMA2 # 4
HandleDMA3 # 4
HandleMMC # 4
HandleSPI0 # 4
HandleUART1 # 4
HandleRSV24 # 4
HandleUSBD # 4
HandleUSBH # 4
HandleIIC # 4
HandleUART0 # 4
HandleSPI1 # 4
HandleRTC # 4
HandleADC # 4END
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